upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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68 lines
1.6 KiB
68 lines
1.6 KiB
/*
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* (C) Copyright 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Helper functions for Rockchip images
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*/
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#include "imagetool.h"
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#include <image.h>
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#include <rc4.h>
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#include "mkimage.h"
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#include "rkcommon.h"
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enum {
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RK_SIGNATURE = 0x0ff0aa55,
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};
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/**
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* struct header0_info - header block for boot ROM
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*
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* This is stored at SD card block 64 (where each block is 512 bytes, or at
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* the start of SPI flash. It is encoded with RC4.
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*
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* @signature: Signature (must be RKSD_SIGNATURE)
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* @disable_rc4: 0 to use rc4 for boot image, 1 to use plain binary
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* @init_offset: Offset in blocks of the SPL code from this header
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* block. E.g. 4 means 2KB after the start of this header.
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* Other fields are not used by U-Boot
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*/
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struct header0_info {
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uint32_t signature;
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uint8_t reserved[4];
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uint32_t disable_rc4;
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uint16_t init_offset;
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uint8_t reserved1[492];
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uint16_t init_size;
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uint16_t init_boot_size;
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uint8_t reserved2[2];
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};
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static unsigned char rc4_key[16] = {
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124, 78, 3, 4, 85, 5, 9, 7,
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45, 44, 123, 56, 23, 13, 23, 17
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};
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int rkcommon_set_header(void *buf, uint file_size)
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{
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struct header0_info *hdr;
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if (file_size > CONFIG_ROCKCHIP_MAX_SPL_SIZE)
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return -ENOSPC;
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memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
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hdr = (struct header0_info *)buf;
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hdr->signature = RK_SIGNATURE;
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hdr->disable_rc4 = 1;
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hdr->init_offset = RK_INIT_OFFSET;
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hdr->init_size = (file_size + RK_BLK_SIZE - 1) / RK_BLK_SIZE;
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hdr->init_size = (hdr->init_size + 3) & ~3;
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hdr->init_boot_size = hdr->init_size + RK_MAX_BOOT_SIZE / RK_BLK_SIZE;
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rc4_encode(buf, RK_BLK_SIZE, rc4_key);
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return 0;
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}
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