upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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88 lines
1.7 KiB
88 lines
1.7 KiB
/*
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* Copyright (C) 2012
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* Gabriel Huau <contact@huau-gabriel.fr>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/s3c2440.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <errno.h>
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#define GPIO_INPUT 0x0
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#define GPIO_OUTPUT 0x1
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#define S3C_GPIO_CON 0x0
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#define S3C_GPIO_DAT 0x4
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static uint32_t s3c_gpio_get_bank_addr(unsigned gpio)
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{
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/* There is up to 16 pins per bank, one bank is 0x10 big. */
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uint32_t addr = gpio & ~0xf;
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if (addr >= 0x80 && addr != 0xd0) { /* Wrong GPIO bank. */
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printf("Invalid GPIO bank (bank %02x)\n", addr);
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return 0xffffffff;
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}
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return addr | S3C24X0_GPIO_BASE;
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}
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int gpio_set_value(unsigned gpio, int value)
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{
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uint32_t addr = s3c_gpio_get_bank_addr(gpio);
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if (addr == 0xffffffff)
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return -EINVAL;
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if (value)
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setbits_le32(addr | S3C_GPIO_DAT, 1 << (gpio & 0xf));
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else
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clrbits_le32(addr | S3C_GPIO_DAT, 1 << (gpio & 0xf));
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return 0;
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}
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int gpio_get_value(unsigned gpio)
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{
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uint32_t addr = s3c_gpio_get_bank_addr(gpio);
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if (addr == 0xffffffff)
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return -EINVAL;
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return !!(readl(addr | S3C_GPIO_DAT) & (1 << (gpio & 0xf)));
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}
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int gpio_request(unsigned gpio, const char *label)
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{
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return 0;
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}
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int gpio_free(unsigned gpio)
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{
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return 0;
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}
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static int s3c_gpio_direction(unsigned gpio, uint8_t dir)
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{
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uint32_t addr = s3c_gpio_get_bank_addr(gpio);
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const uint32_t mask = 0x3 << ((gpio & 0xf) << 1);
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const uint32_t dirm = dir << ((gpio & 0xf) << 1);
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if (addr == 0xffffffff)
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return -EINVAL;
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clrsetbits_le32(addr | S3C_GPIO_CON, mask, dirm);
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return 0;
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}
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int gpio_direction_input(unsigned gpio)
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{
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return s3c_gpio_direction(gpio, GPIO_INPUT);
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}
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int gpio_direction_output(unsigned gpio, int value)
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{
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return s3c_gpio_direction(gpio, GPIO_OUTPUT);
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}
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