upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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254 lines
5.9 KiB
254 lines
5.9 KiB
/* -------------------------------------------------------------------- */
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/* TQM8xxL Boards by TQ Components */
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/* SC8xx Boards by SinoVee Microsystems */
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/* -------------------------------------------------------------------- */
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#include <common.h>
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#include <asm/io.h>
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#ifdef CONFIG_8xx
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#include <mpc8xx.h>
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#endif
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#include <pcmcia.h>
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#undef CONFIG_PCMCIA
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#if defined(CONFIG_CMD_PCMCIA)
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#define CONFIG_PCMCIA
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#endif
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#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
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#define CONFIG_PCMCIA
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#endif
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#if defined(CONFIG_PCMCIA) \
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&& defined(CONFIG_TQM8xxL)
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#if defined(CONFIG_TQM8xxL)
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#define PCMCIA_BOARD_MSG "TQM8xxL"
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#endif
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static inline void power_config(int slot)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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/*
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* Configure Port C pins for
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* 5 Volts Enable and 3 Volts enable
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*/
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clrbits_be16(&immap->im_ioport.iop_pcpar, 0x0002 | 0x0004);
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clrbits_be16(&immap->im_ioport.iop_pcso, 0x0002 | 0x0004);
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}
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static inline void power_off(int slot)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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clrbits_be16(&immap->im_ioport.iop_pcdat, 0x0002 | 0x0004);
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}
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static inline void power_on_5_0(int slot)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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setbits_be16(&immap->im_ioport.iop_pcdat, 0x0004);
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setbits_be16(&immap->im_ioport.iop_pcdir, 0x0002 | 0x0004);
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}
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static inline void power_on_3_3(int slot)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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setbits_be16(&immap->im_ioport.iop_pcdat, 0x0002);
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setbits_be16(&immap->im_ioport.iop_pcdir, 0x0002 | 0x0004);
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}
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/*
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* Function to retrieve the PIPR register, used for debuging purposes.
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*/
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static inline uint32_t debug_get_pipr(void)
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{
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uint32_t pipr = 0;
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#ifdef DEBUG
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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pipr = in_be32(&immap->im_pcmcia.pcmc_pipr);
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#endif
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return pipr;
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}
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static inline int check_card_is_absent(int slot)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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uint32_t pipr = in_be32(&immap->im_pcmcia.pcmc_pipr);
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return pipr & (0x18000000 >> (slot << 4));
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}
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#define NSCU_GCRX_CXOE __MY_PCMCIA_GCRX_CXOE
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int pcmcia_hardware_enable(int slot)
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{
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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uint reg, mask;
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debug("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
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udelay(10000);
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/*
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* Configure SIUMCR to enable PCMCIA port B
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* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
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*/
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/* Set DBGC to 00 */
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clrbits_be32(&immap->im_siu_conf.sc_siumcr, SIUMCR_DBGC11);
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/* Clear interrupt state, and disable interrupts */
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out_be32(&immap->im_pcmcia.pcmc_pscr, PCMCIA_MASK(slot));
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clrbits_be32(&immap->im_pcmcia.pcmc_per, PCMCIA_MASK(slot));
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/*
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* Disable interrupts, DMA, and PCMCIA buffers
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* (isolate the interface) and assert RESET signal
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*/
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debug("Disable PCMCIA buffers and assert RESET\n");
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reg = 0;
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= NSCU_GCRX_CXOE;
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PCMCIA_PGCRX(slot) = reg;
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udelay(500);
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power_config(slot);
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power_off(slot);
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/*
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* Make sure there is a card in the slot, then configure the interface.
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*/
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udelay(10000);
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reg = debug_get_pipr();
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debug("[%d] %s: PIPR(%p)=0x%x\n", __LINE__, __FUNCTION__,
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&immap->im_pcmcia.pcmc_pipr, reg);
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if (check_card_is_absent(slot)) {
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printf (" No Card found\n");
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return (1);
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}
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/*
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* Power On.
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*/
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mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
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reg = in_be32(&immap->im_pcmcia.pcmc_pipr);
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debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
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reg,
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(reg & PCMCIA_VS1(slot)) ? "n" : "ff",
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(reg & PCMCIA_VS2(slot)) ? "n" : "ff");
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if ((reg & mask) == mask) {
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power_on_5_0(slot);
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puts (" 5.0V card found: ");
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} else {
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power_on_3_3(slot);
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puts (" 3.3V card found: ");
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}
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#if 0
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/* VCC switch error flag, PCMCIA slot INPACK_ pin */
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cp->cp_pbdir &= ~(0x0020 | 0x0010);
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cp->cp_pbpar &= ~(0x0020 | 0x0010);
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udelay(500000);
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#endif
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udelay(1000);
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debug("Enable PCMCIA buffers and stop RESET\n");
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reg = PCMCIA_PGCRX(slot);
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reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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reg &= ~NSCU_GCRX_CXOE;
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PCMCIA_PGCRX(slot) = reg;
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udelay(250000); /* some cards need >150 ms to come up :-( */
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debug("# hardware_enable done\n");
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return (0);
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}
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#if defined(CONFIG_CMD_PCMCIA)
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int pcmcia_hardware_disable(int slot)
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{
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u_long reg;
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debug("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
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/* remove all power */
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power_off(slot);
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debug("Disable PCMCIA buffers and assert RESET\n");
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reg = 0;
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= NSCU_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(slot) = reg;
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udelay(10000);
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return (0);
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}
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#endif
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int pcmcia_voltage_set(int slot, int vcc, int vpp)
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{
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u_long reg;
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uint32_t pipr = 0;
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debug("voltage_set: " PCMCIA_BOARD_MSG
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" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
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'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
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/*
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* Disable PCMCIA buffers (isolate the interface)
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* and assert RESET signal
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*/
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debug("Disable PCMCIA buffers and assert RESET\n");
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reg = PCMCIA_PGCRX(slot);
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
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reg |= NSCU_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(slot) = reg;
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udelay(500);
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debug("PCMCIA power OFF\n");
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power_config(slot);
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power_off(slot);
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switch(vcc) {
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case 0: break;
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case 33: power_on_3_3(slot); break;
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case 50: power_on_5_0(slot); break;
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default: goto done;
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}
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/* Checking supported voltages */
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pipr = debug_get_pipr();
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debug("PIPR: 0x%x --> %s\n", pipr,
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(pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
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if (vcc)
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debug("PCMCIA powered at %sV\n", (vcc == 50) ? "5.0" : "3.3");
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else
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debug("PCMCIA powered down\n");
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done:
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debug("Enable PCMCIA buffers and stop RESET\n");
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reg = PCMCIA_PGCRX(slot);
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reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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reg &= ~NSCU_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(slot) = reg;
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udelay(500);
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debug("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n", slot+'A');
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return 0;
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}
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#endif /* CONFIG_PCMCIA && CONFIG_TQM8xxL */
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