upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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162 lines
4.2 KiB
162 lines
4.2 KiB
/*
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* (C) Copyright 2008-2011 Michal Simek <monstr@monstr.eu>
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* Clean driver and add xilinx constant from header file
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*
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* (C) Copyright 2004 Atmark Techno, Inc.
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* Yasushi SHOJI <yashi@atmark-techno.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/io.h>
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#include <linux/compiler.h>
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#include <serial.h>
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#define SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */
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#define SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
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#define SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
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#define ULITE_CONTROL_RST_TX 0x01
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#define ULITE_CONTROL_RST_RX 0x02
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struct uartlite {
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unsigned int rx_fifo;
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unsigned int tx_fifo;
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unsigned int status;
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unsigned int control;
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};
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static struct uartlite *userial_ports[4] = {
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#ifdef XILINX_UARTLITE_BASEADDR
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[0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
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#endif
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#ifdef XILINX_UARTLITE_BASEADDR1
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[1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
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#endif
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#ifdef XILINX_UARTLITE_BASEADDR2
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[2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
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#endif
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#ifdef XILINX_UARTLITE_BASEADDR3
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[3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
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#endif
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};
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static void uartlite_serial_putc(const char c, const int port)
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{
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struct uartlite *regs = userial_ports[port];
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if (c == '\n')
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uartlite_serial_putc('\r', port);
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while (in_be32(®s->status) & SR_TX_FIFO_FULL)
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;
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out_be32(®s->tx_fifo, c & 0xff);
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}
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static void uartlite_serial_puts(const char *s, const int port)
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{
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while (*s)
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uartlite_serial_putc(*s++, port);
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}
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static int uartlite_serial_getc(const int port)
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{
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struct uartlite *regs = userial_ports[port];
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while (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA))
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;
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return in_be32(®s->rx_fifo) & 0xff;
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}
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static int uartlite_serial_tstc(const int port)
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{
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struct uartlite *regs = userial_ports[port];
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return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA;
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}
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static int uartlite_serial_init(const int port)
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{
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struct uartlite *regs = userial_ports[port];
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if (regs) {
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out_be32(®s->control, 0);
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out_be32(®s->control,
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ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
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in_be32(®s->control);
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return 0;
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}
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return -1;
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}
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/* Multi serial device functions */
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#define DECLARE_ESERIAL_FUNCTIONS(port) \
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static int userial##port##_init(void) \
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{ return uartlite_serial_init(port); } \
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static void userial##port##_setbrg(void) {} \
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static int userial##port##_getc(void) \
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{ return uartlite_serial_getc(port); } \
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static int userial##port##_tstc(void) \
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{ return uartlite_serial_tstc(port); } \
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static void userial##port##_putc(const char c) \
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{ uartlite_serial_putc(c, port); } \
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static void userial##port##_puts(const char *s) \
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{ uartlite_serial_puts(s, port); }
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/* Serial device descriptor */
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#define INIT_ESERIAL_STRUCTURE(port, __name) { \
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.name = __name, \
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.start = userial##port##_init, \
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.stop = NULL, \
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.setbrg = userial##port##_setbrg, \
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.getc = userial##port##_getc, \
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.tstc = userial##port##_tstc, \
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.putc = userial##port##_putc, \
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.puts = userial##port##_puts, \
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}
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DECLARE_ESERIAL_FUNCTIONS(0);
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struct serial_device uartlite_serial0_device =
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INIT_ESERIAL_STRUCTURE(0, "ttyUL0");
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DECLARE_ESERIAL_FUNCTIONS(1);
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struct serial_device uartlite_serial1_device =
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INIT_ESERIAL_STRUCTURE(1, "ttyUL1");
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DECLARE_ESERIAL_FUNCTIONS(2);
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struct serial_device uartlite_serial2_device =
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INIT_ESERIAL_STRUCTURE(2, "ttyUL2");
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DECLARE_ESERIAL_FUNCTIONS(3);
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struct serial_device uartlite_serial3_device =
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INIT_ESERIAL_STRUCTURE(3, "ttyUL3");
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__weak struct serial_device *default_serial_console(void)
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{
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if (userial_ports[0])
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return &uartlite_serial0_device;
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if (userial_ports[1])
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return &uartlite_serial1_device;
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if (userial_ports[2])
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return &uartlite_serial2_device;
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if (userial_ports[3])
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return &uartlite_serial3_device;
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return NULL;
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}
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void uartlite_serial_initialize(void)
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{
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#ifdef XILINX_UARTLITE_BASEADDR
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serial_register(&uartlite_serial0_device);
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#endif /* XILINX_UARTLITE_BASEADDR */
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#ifdef XILINX_UARTLITE_BASEADDR1
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serial_register(&uartlite_serial1_device);
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#endif /* XILINX_UARTLITE_BASEADDR1 */
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#ifdef XILINX_UARTLITE_BASEADDR2
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serial_register(&uartlite_serial2_device);
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#endif /* XILINX_UARTLITE_BASEADDR2 */
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#ifdef XILINX_UARTLITE_BASEADDR3
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serial_register(&uartlite_serial3_device);
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#endif /* XILINX_UARTLITE_BASEADDR3 */
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}
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