upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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143 lines
3.1 KiB
143 lines
3.1 KiB
/*
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* (C) Copyright 2009 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#define CON_MASK(x) (0xf << ((x) << 2))
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#define CON_SFR(x, v) ((v) << ((x) << 2))
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#define DAT_MASK(x) (0x1 << (x))
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#define DAT_SET(x) (0x1 << (x))
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#define PULL_MASK(x) (0x3 << ((x) << 1))
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#define PULL_MODE(x, v) ((v) << ((x) << 1))
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#define DRV_MASK(x) (0x3 << ((x) << 1))
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#define DRV_SET(x, m) ((m) << ((x) << 1))
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#define RATE_MASK(x) (0x1 << (x + 16))
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#define RATE_SET(x) (0x1 << (x + 16))
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void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg)
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{
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unsigned int value;
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value = readl(&bank->con);
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value &= ~CON_MASK(gpio);
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value |= CON_SFR(gpio, cfg);
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writel(value, &bank->con);
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}
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void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en)
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{
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unsigned int value;
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gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
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value = readl(&bank->dat);
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value &= ~DAT_MASK(gpio);
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if (en)
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value |= DAT_SET(gpio);
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writel(value, &bank->dat);
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}
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void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio)
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{
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gpio_cfg_pin(bank, gpio, GPIO_INPUT);
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}
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void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en)
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{
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unsigned int value;
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value = readl(&bank->dat);
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value &= ~DAT_MASK(gpio);
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if (en)
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value |= DAT_SET(gpio);
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writel(value, &bank->dat);
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}
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unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio)
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{
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unsigned int value;
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value = readl(&bank->dat);
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return !!(value & DAT_MASK(gpio));
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}
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void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode)
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{
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unsigned int value;
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value = readl(&bank->pull);
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value &= ~PULL_MASK(gpio);
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switch (mode) {
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case GPIO_PULL_DOWN:
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case GPIO_PULL_UP:
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value |= PULL_MODE(gpio, mode);
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break;
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default:
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return;
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}
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writel(value, &bank->pull);
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}
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void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode)
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{
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unsigned int value;
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value = readl(&bank->drv);
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value &= ~DRV_MASK(gpio);
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switch (mode) {
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case GPIO_DRV_1X:
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case GPIO_DRV_2X:
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case GPIO_DRV_3X:
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case GPIO_DRV_4X:
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value |= DRV_SET(gpio, mode);
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break;
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default:
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return;
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}
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writel(value, &bank->drv);
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}
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void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode)
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{
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unsigned int value;
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value = readl(&bank->drv);
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value &= ~RATE_MASK(gpio);
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switch (mode) {
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case GPIO_DRV_FAST:
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case GPIO_DRV_SLOW:
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value |= RATE_SET(gpio);
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break;
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default:
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return;
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}
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writel(value, &bank->drv);
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}
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