upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Marek Vasut 8e9e62c946 ddr: altera: Fix scc_mgr_set() argument order ... The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>		9 years ago
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altera	ddr: altera: Fix scc_mgr_set() argument order	9 years ago
fsl	Fix typo choosen in comments and printf logs	9 years ago
marvell	arm: mvebu: Fix ddr3_init() cpu config	9 years ago
microchip	…