upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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637 lines
16 KiB
637 lines
16 KiB
/*
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* (C) Copyright 2003-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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********************************************************************
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*
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* Lots of code copied from:
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*
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* i82365.c 1.352 - Linux driver for Intel 82365 and compatible
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* PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers.
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* (C) 1999 David A. Hinds <dahinds@users.sourceforge.net>
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*/
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#include <common.h>
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#ifdef CONFIG_I82365
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#include <command.h>
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#include <pci.h>
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#include <pcmcia.h>
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#include <asm/io.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/i82365.h>
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#include <pcmcia/yenta.h>
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#include <pcmcia/ti113x.h>
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static struct pci_device_id supported[] = {
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{PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510},
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{0, 0}
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};
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#define CYCLE_TIME 120
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#ifdef DEBUG
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static void i82365_dump_regions (pci_dev_t dev);
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#endif
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typedef struct socket_info_t {
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pci_dev_t dev;
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u_short bcr;
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u_char pci_lat, cb_lat, sub_bus, cache;
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u_int cb_phys;
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socket_cap_t cap;
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u_short type;
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u_int flags;
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ti113x_state_t state;
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} socket_info_t;
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static socket_info_t socket;
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static socket_state_t state;
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static struct pccard_mem_map mem;
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static struct pccard_io_map io;
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/*====================================================================*/
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/* Some PCI shortcuts */
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static int pci_readb (socket_info_t * s, int r, u_char * v)
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{
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return pci_read_config_byte (s->dev, r, v);
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}
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static int pci_writeb (socket_info_t * s, int r, u_char v)
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{
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return pci_write_config_byte (s->dev, r, v);
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}
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static int pci_readw (socket_info_t * s, int r, u_short * v)
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{
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return pci_read_config_word (s->dev, r, v);
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}
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static int pci_writew (socket_info_t * s, int r, u_short v)
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{
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return pci_write_config_word (s->dev, r, v);
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}
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static int pci_readl (socket_info_t * s, int r, u_int * v)
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{
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return pci_read_config_dword (s->dev, r, v);
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}
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static int pci_writel (socket_info_t * s, int r, u_int v)
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{
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return pci_write_config_dword (s->dev, r, v);
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}
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/*====================================================================*/
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#define cb_readb(s, r) readb((s)->cb_phys + (r))
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#define cb_readl(s, r) readl((s)->cb_phys + (r))
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#define cb_writeb(s, r, v) writeb(v, (s)->cb_phys + (r))
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#define cb_writel(s, r, v) writel(v, (s)->cb_phys + (r))
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static u_char i365_get (socket_info_t * s, u_short reg)
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{
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return cb_readb (s, 0x0800 + reg);
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}
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static void i365_set (socket_info_t * s, u_short reg, u_char data)
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{
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cb_writeb (s, 0x0800 + reg, data);
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}
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static void i365_bset (socket_info_t * s, u_short reg, u_char mask)
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{
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i365_set (s, reg, i365_get (s, reg) | mask);
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}
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static void i365_bclr (socket_info_t * s, u_short reg, u_char mask)
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{
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i365_set (s, reg, i365_get (s, reg) & ~mask);
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}
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#if 0 /* not used */
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static void i365_bflip (socket_info_t * s, u_short reg, u_char mask, int b)
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{
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u_char d = i365_get (s, reg);
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i365_set (s, reg, (b) ? (d | mask) : (d & ~mask));
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}
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static u_short i365_get_pair (socket_info_t * s, u_short reg)
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{
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return (i365_get (s, reg) + (i365_get (s, reg + 1) << 8));
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}
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#endif /* not used */
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static void i365_set_pair (socket_info_t * s, u_short reg, u_short data)
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{
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i365_set (s, reg, data & 0xff);
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i365_set (s, reg + 1, data >> 8);
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}
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/*======================================================================
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Code to save and restore global state information for TI 1130 and
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TI 1131 controllers, and to set and report global configuration
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options.
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======================================================================*/
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static void ti113x_get_state (socket_info_t * s)
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{
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ti113x_state_t *p = &s->state;
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pci_readl (s, TI113X_SYSTEM_CONTROL, &p->sysctl);
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pci_readb (s, TI113X_CARD_CONTROL, &p->cardctl);
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pci_readb (s, TI113X_DEVICE_CONTROL, &p->devctl);
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pci_readb (s, TI1250_DIAGNOSTIC, &p->diag);
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pci_readl (s, TI12XX_IRQMUX, &p->irqmux);
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}
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static void ti113x_set_state (socket_info_t * s)
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{
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ti113x_state_t *p = &s->state;
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pci_writel (s, TI113X_SYSTEM_CONTROL, p->sysctl);
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pci_writeb (s, TI113X_CARD_CONTROL, p->cardctl);
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pci_writeb (s, TI113X_DEVICE_CONTROL, p->devctl);
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pci_writeb (s, TI1250_MULTIMEDIA_CTL, 0);
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pci_writeb (s, TI1250_DIAGNOSTIC, p->diag);
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pci_writel (s, TI12XX_IRQMUX, p->irqmux);
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i365_set_pair (s, TI113X_IO_OFFSET (0), 0);
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i365_set_pair (s, TI113X_IO_OFFSET (1), 0);
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}
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static u_int ti113x_set_opts (socket_info_t * s)
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{
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ti113x_state_t *p = &s->state;
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u_int mask = 0xffff;
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p->cardctl &= ~TI113X_CCR_ZVENABLE;
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p->cardctl |= TI113X_CCR_SPKROUTEN;
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return mask;
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}
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/*======================================================================
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Routines to handle common CardBus options
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======================================================================*/
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/* Default settings for PCI command configuration register */
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#define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
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PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
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static void cb_get_state (socket_info_t * s)
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{
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pci_readb (s, PCI_CACHE_LINE_SIZE, &s->cache);
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pci_readb (s, PCI_LATENCY_TIMER, &s->pci_lat);
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pci_readb (s, CB_LATENCY_TIMER, &s->cb_lat);
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pci_readb (s, CB_CARDBUS_BUS, &s->cap.cardbus);
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pci_readb (s, CB_SUBORD_BUS, &s->sub_bus);
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pci_readw (s, CB_BRIDGE_CONTROL, &s->bcr);
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}
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static void cb_set_state (socket_info_t * s)
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{
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pci_writel (s, CB_LEGACY_MODE_BASE, 0);
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pci_writel (s, PCI_BASE_ADDRESS_0, s->cb_phys);
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pci_writew (s, PCI_COMMAND, CMD_DFLT);
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pci_writeb (s, PCI_CACHE_LINE_SIZE, s->cache);
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pci_writeb (s, PCI_LATENCY_TIMER, s->pci_lat);
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pci_writeb (s, CB_LATENCY_TIMER, s->cb_lat);
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pci_writeb (s, CB_CARDBUS_BUS, s->cap.cardbus);
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pci_writeb (s, CB_SUBORD_BUS, s->sub_bus);
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pci_writew (s, CB_BRIDGE_CONTROL, s->bcr);
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}
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static void cb_set_opts (socket_info_t * s)
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{
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if (s->cache == 0)
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s->cache = 8;
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if (s->pci_lat == 0)
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s->pci_lat = 0xa8;
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if (s->cb_lat == 0)
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s->cb_lat = 0xb0;
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}
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/*======================================================================
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Power control for Cardbus controllers: used both for 16-bit and
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Cardbus cards.
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======================================================================*/
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static int cb_set_power (socket_info_t * s, socket_state_t * state)
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{
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u_int reg = 0;
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/* restart card voltage detection if it seems appropriate */
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if ((state->Vcc == 0) && (state->Vpp == 0) &&
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!(cb_readl (s, CB_SOCKET_STATE) & CB_SS_VSENSE))
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cb_writel (s, CB_SOCKET_FORCE, CB_SF_CVSTEST);
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switch (state->Vcc) {
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case 0:
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reg = 0;
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break;
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case 33:
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reg = CB_SC_VCC_3V;
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break;
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case 50:
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reg = CB_SC_VCC_5V;
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break;
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default:
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return -1;
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}
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switch (state->Vpp) {
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case 0:
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break;
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case 33:
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reg |= CB_SC_VPP_3V;
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break;
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case 50:
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reg |= CB_SC_VPP_5V;
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break;
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case 120:
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reg |= CB_SC_VPP_12V;
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break;
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default:
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return -1;
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}
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if (reg != cb_readl (s, CB_SOCKET_CONTROL))
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cb_writel (s, CB_SOCKET_CONTROL, reg);
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return 0;
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}
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/*======================================================================
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Generic routines to get and set controller options
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======================================================================*/
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static void get_bridge_state (socket_info_t * s)
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{
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ti113x_get_state (s);
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cb_get_state (s);
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}
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static void set_bridge_state (socket_info_t * s)
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{
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cb_set_state (s);
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i365_set (s, I365_GBLCTL, 0x00);
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i365_set (s, I365_GENCTL, 0x00);
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ti113x_set_state (s);
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}
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static void set_bridge_opts (socket_info_t * s)
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{
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ti113x_set_opts (s);
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cb_set_opts (s);
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}
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/*====================================================================*/
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#define PD67_EXT_INDEX 0x2e /* Extension index */
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#define PD67_EXT_DATA 0x2f /* Extension data */
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#define PD67_EXD_VS1(s) (0x01 << ((s)<<1))
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#define pd67_ext_get(s, r) \
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(i365_set(s, PD67_EXT_INDEX, r), i365_get(s, PD67_EXT_DATA))
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static int i365_get_status (socket_info_t * s, u_int * value)
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{
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u_int status;
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status = i365_get (s, I365_IDENT);
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status = i365_get (s, I365_STATUS);
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*value = ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
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if (i365_get (s, I365_INTCTL) & I365_PC_IOCARD) {
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*value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
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} else {
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*value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
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*value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
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}
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*value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
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*value |= (status & I365_CS_READY) ? SS_READY : 0;
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*value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
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status = cb_readl (s, CB_SOCKET_STATE);
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*value |= (status & CB_SS_32BIT) ? SS_CARDBUS : 0;
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*value |= (status & CB_SS_3VCARD) ? SS_3VCARD : 0;
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*value |= (status & CB_SS_XVCARD) ? SS_XVCARD : 0;
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*value |= (status & CB_SS_VSENSE) ? 0 : SS_PENDING;
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/* For now, ignore cards with unsupported voltage keys */
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if (*value & SS_XVCARD)
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*value &= ~(SS_DETECT | SS_3VCARD | SS_XVCARD);
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return 0;
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} /* i365_get_status */
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static int i365_set_socket (socket_info_t * s, socket_state_t * state)
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{
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u_char reg;
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set_bridge_state (s);
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/* IO card, RESET flag */
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reg = 0;
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reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
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reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
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i365_set (s, I365_INTCTL, reg);
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reg = I365_PWR_NORESET;
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if (state->flags & SS_PWR_AUTO)
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reg |= I365_PWR_AUTO;
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if (state->flags & SS_OUTPUT_ENA)
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reg |= I365_PWR_OUT;
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cb_set_power (s, state);
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reg |= i365_get (s, I365_POWER) & (I365_VCC_MASK | I365_VPP1_MASK);
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if (reg != i365_get (s, I365_POWER))
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i365_set (s, I365_POWER, reg);
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return 0;
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} /* i365_set_socket */
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/*====================================================================*/
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static int i365_set_mem_map (socket_info_t * s, struct pccard_mem_map *mem)
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{
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u_short base, i;
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u_char map;
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debug ("i82365: SetMemMap(%d, %#2.2x, %d ns, %#5.5lx-%#5.5lx, %#5.5x)\n",
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mem->map, mem->flags, mem->speed,
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mem->sys_start, mem->sys_stop, mem->card_start);
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map = mem->map;
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if ((map > 4) ||
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(mem->card_start > 0x3ffffff) ||
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(mem->sys_start > mem->sys_stop) ||
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(mem->speed > 1000)) {
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return -1;
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}
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/* Turn off the window before changing anything */
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if (i365_get (s, I365_ADDRWIN) & I365_ENA_MEM (map))
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i365_bclr (s, I365_ADDRWIN, I365_ENA_MEM (map));
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/* Take care of high byte, for PCI controllers */
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i365_set (s, CB_MEM_PAGE (map), mem->sys_start >> 24);
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base = I365_MEM (map);
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i = (mem->sys_start >> 12) & 0x0fff;
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if (mem->flags & MAP_16BIT)
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i |= I365_MEM_16BIT;
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if (mem->flags & MAP_0WS)
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i |= I365_MEM_0WS;
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i365_set_pair (s, base + I365_W_START, i);
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i = (mem->sys_stop >> 12) & 0x0fff;
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switch (mem->speed / CYCLE_TIME) {
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case 0:
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break;
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case 1:
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i |= I365_MEM_WS0;
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break;
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case 2:
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i |= I365_MEM_WS1;
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break;
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default:
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i |= I365_MEM_WS1 | I365_MEM_WS0;
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break;
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}
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i365_set_pair (s, base + I365_W_STOP, i);
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i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
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if (mem->flags & MAP_WRPROT)
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i |= I365_MEM_WRPROT;
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if (mem->flags & MAP_ATTRIB)
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i |= I365_MEM_REG;
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i365_set_pair (s, base + I365_W_OFF, i);
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/* Turn on the window if necessary */
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if (mem->flags & MAP_ACTIVE)
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i365_bset (s, I365_ADDRWIN, I365_ENA_MEM (map));
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return 0;
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} /* i365_set_mem_map */
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static int i365_set_io_map (socket_info_t * s, struct pccard_io_map *io)
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{
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u_char map, ioctl;
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map = io->map;
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/* comment out: comparison is always false due to limited range of data type */
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if ((map > 1) || /* (io->start > 0xffff) || (io->stop > 0xffff) || */
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(io->stop < io->start))
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return -1;
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/* Turn off the window before changing anything */
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if (i365_get (s, I365_ADDRWIN) & I365_ENA_IO (map))
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i365_bclr (s, I365_ADDRWIN, I365_ENA_IO (map));
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i365_set_pair (s, I365_IO (map) + I365_W_START, io->start);
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i365_set_pair (s, I365_IO (map) + I365_W_STOP, io->stop);
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ioctl = i365_get (s, I365_IOCTL) & ~I365_IOCTL_MASK (map);
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if (io->speed)
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ioctl |= I365_IOCTL_WAIT (map);
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if (io->flags & MAP_0WS)
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ioctl |= I365_IOCTL_0WS (map);
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if (io->flags & MAP_16BIT)
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ioctl |= I365_IOCTL_16BIT (map);
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if (io->flags & MAP_AUTOSZ)
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ioctl |= I365_IOCTL_IOCS16 (map);
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i365_set (s, I365_IOCTL, ioctl);
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/* Turn on the window if necessary */
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if (io->flags & MAP_ACTIVE)
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i365_bset (s, I365_ADDRWIN, I365_ENA_IO (map));
|
|
return 0;
|
|
} /* i365_set_io_map */
|
|
|
|
/*====================================================================*/
|
|
|
|
int i82365_init (void)
|
|
{
|
|
u_int val;
|
|
int i;
|
|
|
|
if ((socket.dev = pci_find_devices (supported, 0)) < 0) {
|
|
/* Controller not found */
|
|
return 1;
|
|
}
|
|
debug ("i82365 Device Found!\n");
|
|
|
|
pci_read_config_dword (socket.dev, PCI_BASE_ADDRESS_0, &socket.cb_phys);
|
|
socket.cb_phys &= ~0xf;
|
|
|
|
get_bridge_state (&socket);
|
|
set_bridge_opts (&socket);
|
|
|
|
i = i365_get_status (&socket, &val);
|
|
|
|
if (val & SS_DETECT) {
|
|
if (val & SS_3VCARD) {
|
|
state.Vcc = state.Vpp = 33;
|
|
puts (" 3.3V card found: ");
|
|
} else if (!(val & SS_XVCARD)) {
|
|
state.Vcc = state.Vpp = 50;
|
|
puts (" 5.0V card found: ");
|
|
} else {
|
|
puts ("i82365: unsupported voltage key\n");
|
|
state.Vcc = state.Vpp = 0;
|
|
}
|
|
} else {
|
|
/* No card inserted */
|
|
puts ("No card\n");
|
|
return 1;
|
|
}
|
|
|
|
state.flags = SS_IOCARD | SS_OUTPUT_ENA;
|
|
state.csc_mask = 0;
|
|
state.io_irq = 0;
|
|
|
|
i365_set_socket (&socket, &state);
|
|
|
|
for (i = 500; i; i--) {
|
|
if ((i365_get (&socket, I365_STATUS) & I365_CS_READY))
|
|
break;
|
|
udelay (1000);
|
|
}
|
|
|
|
if (i == 0) {
|
|
/* PC Card not ready for data transfer */
|
|
puts ("i82365 PC Card not ready for data transfer\n");
|
|
return 1;
|
|
}
|
|
debug (" PC Card ready for data transfer: ");
|
|
|
|
mem.map = 0;
|
|
mem.flags = MAP_ATTRIB | MAP_ACTIVE;
|
|
mem.speed = 300;
|
|
mem.sys_start = CFG_PCMCIA_MEM_ADDR;
|
|
mem.sys_stop = CFG_PCMCIA_MEM_ADDR + CFG_PCMCIA_MEM_SIZE - 1;
|
|
mem.card_start = 0;
|
|
i365_set_mem_map (&socket, &mem);
|
|
|
|
io.map = 0;
|
|
io.flags = MAP_AUTOSZ | MAP_ACTIVE;
|
|
io.speed = 0;
|
|
io.start = 0x0100;
|
|
io.stop = 0x010F;
|
|
i365_set_io_map (&socket, &io);
|
|
|
|
#ifdef DEBUG
|
|
i82365_dump_regions (socket.dev);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
void i82365_exit (void)
|
|
{
|
|
io.map = 0;
|
|
io.flags = 0;
|
|
io.speed = 0;
|
|
io.start = 0;
|
|
io.stop = 0x1;
|
|
|
|
i365_set_io_map (&socket, &io);
|
|
|
|
mem.map = 0;
|
|
mem.flags = 0;
|
|
mem.speed = 0;
|
|
mem.sys_start = 0;
|
|
mem.sys_stop = 0x1000;
|
|
mem.card_start = 0;
|
|
|
|
i365_set_mem_map (&socket, &mem);
|
|
|
|
socket.state.sysctl &= 0xFFFF00FF;
|
|
|
|
state.Vcc = state.Vpp = 0;
|
|
|
|
i365_set_socket (&socket, &state);
|
|
}
|
|
|
|
int pcmcia_on (void)
|
|
{
|
|
u_int rc;
|
|
|
|
debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
|
|
|
|
rc = i82365_init();
|
|
if (rc)
|
|
goto exit;
|
|
|
|
rc = check_ide_device(0);
|
|
if (rc == 0)
|
|
goto exit;
|
|
|
|
i82365_exit();
|
|
|
|
exit:
|
|
return rc;
|
|
}
|
|
|
|
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
|
|
int pcmcia_off (void)
|
|
{
|
|
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
|
|
|
|
i82365_exit();
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*======================================================================
|
|
|
|
Debug stuff
|
|
|
|
======================================================================*/
|
|
|
|
#ifdef DEBUG
|
|
static void i82365_dump_regions (pci_dev_t dev)
|
|
{
|
|
u_int tmp[2];
|
|
u_int *mem = (void *) socket.cb_phys;
|
|
u_char *cis = (void *) CFG_PCMCIA_MEM_ADDR;
|
|
u_char *ide = (void *) (CFG_ATA_BASE_ADDR + CFG_ATA_REG_OFFSET);
|
|
|
|
pci_read_config_dword (dev, 0x00, tmp + 0);
|
|
pci_read_config_dword (dev, 0x80, tmp + 1);
|
|
|
|
printf ("PCI CONF: %08X ... %08X\n",
|
|
tmp[0], tmp[1]);
|
|
printf ("PCI MEM: ... %08X ... %08X\n",
|
|
mem[0x8 / 4], mem[0x800 / 4]);
|
|
printf ("CIS: ...%c%c%c%c%c%c%c%c...\n",
|
|
cis[0x38], cis[0x3a], cis[0x3c], cis[0x3e],
|
|
cis[0x40], cis[0x42], cis[0x44], cis[0x48]);
|
|
printf ("CIS CONF: %02X %02X %02X ...\n",
|
|
cis[0x200], cis[0x202], cis[0x204]);
|
|
printf ("IDE: %02X %02X %02X %02X %02X %02X %02X %02X\n",
|
|
ide[0], ide[1], ide[2], ide[3],
|
|
ide[4], ide[5], ide[6], ide[7]);
|
|
}
|
|
#endif /* DEBUG */
|
|
|
|
#endif /* CONFIG_I82365 */
|
|
|