upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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74 lines
1.4 KiB
74 lines
1.4 KiB
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* ide.c - ide support functions */
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#include <common.h>
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#if defined(CONFIG_CMD_IDE)
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#include <ata.h>
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#include <ide.h>
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#include <pci.h>
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int cpci_hd_type;
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int ata_device(int dev)
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{
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int retval;
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retval = (dev & 1) << 4;
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if (cpci_hd_type == 2)
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retval ^= 1 << 4;
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return retval;
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}
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int ide_preinit (void)
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{
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int status;
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pci_dev_t devbusfn;
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int l;
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status = 1;
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cpci_hd_type = 0;
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if (CPCI750_SLAVE_TEST != 0)
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return status;
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for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
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ide_bus_offset[l] = -ATA_STATUS;
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}
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devbusfn = pci_find_device (0x1103, 0x0004, 0);
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if (devbusfn != -1) {
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cpci_hd_type = 1;
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} else {
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devbusfn = pci_find_device (0x1095, 0x3114, 0);
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if (devbusfn != -1) {
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cpci_hd_type = 2;
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}
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}
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if (devbusfn != -1) {
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ulong *ide_bus_offset_ptr;
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status = 0;
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ide_bus_offset_ptr = &ide_bus_offset[0];
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
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(u32 *)ide_bus_offset_ptr);
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ide_bus_offset[0] &= 0xfffffffe;
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ide_bus_offset[0] += CONFIG_SYS_PCI0_IO_SPACE;
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ide_bus_offset_ptr = &ide_bus_offset[1];
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
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(u32 *)ide_bus_offset_ptr);
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ide_bus_offset[1] &= 0xfffffffe;
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ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE;
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}
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return status;
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}
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void ide_set_reset (int flag) {
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return;
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}
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#endif /* of CONFIG_CMDS_IDE */
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