upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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440 lines
9.7 KiB
440 lines
9.7 KiB
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mpc8xx.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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#if defined(CONFIG_ENV_IS_IN_FLASH)
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# ifndef CONFIG_ENV_ADDR
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# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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# endif
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# ifndef CONFIG_ENV_SIZE
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# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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# endif
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# ifndef CONFIG_ENV_SECT_SIZE
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# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
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# endif
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#endif
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info);
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static int write_word (flash_info_t *info, ulong dest, ulong data);
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static void flash_get_offsets (ulong base, flash_info_t *info);
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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{
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE;
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unsigned long size;
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int i;
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/* Init: enable write,
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* or we cannot even write flash commands
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*/
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bcsr->bd_ctrl |= BD_CTRL_FLWE;
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for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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}
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/* Static FLASH Bank configuration here - FIXME XXX */
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size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]);
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if (flash_info[0].flash_id == FLASH_UNKNOWN) {
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printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
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size, size<<20);
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}
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/* Remap FLASH according to real size */
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memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000);
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memctl->memc_br1 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) |
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(memctl->memc_br1 & ~(BR_BA_MSK));
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/* Re-do sizing to get full correct info */
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size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
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flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
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flash_info[0].size = size;
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE,
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#endif
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#ifdef CONFIG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
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&flash_info[0]);
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#endif
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return (size);
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_get_offsets (ulong base, flash_info_t *info)
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{
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int i;
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/* all possible flash types
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* (28F016SV, 28F160S3, 28F320S3)
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* have the same erase block size: 64 kB per chip,
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* of 128 kB per bank
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*/
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/* set up sector start address table */
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base;
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base += 0x00020000;
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL: printf ("Intel "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
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break;
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case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
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break;
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case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
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break;
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default: printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " "
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);
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}
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printf ("\n");
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return;
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}
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/*-----------------------------------------------------------------------
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*/
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info)
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{
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short i;
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ulong value;
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ulong base = (ulong)addr;
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/* Write "Intelligent Identifier" command: read Manufacturer ID */
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*addr = 0x90909090;
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value = addr[0];
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switch (value) {
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case (MT_MANUFACT & 0x00FF00FF): /* MT or => Intel */
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case (INTEL_ALT_MANU & 0x00FF00FF):
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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return (0); /* no or unknown flash */
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}
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value = addr[1]; /* device ID */
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switch (value) {
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case (INTEL_ID_28F016S):
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info->flash_id += FLASH_28F016SV;
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info->sector_count = 32;
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info->size = 0x00400000;
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break; /* => 2x2 MB */
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case (INTEL_ID_28F160S3):
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info->flash_id += FLASH_28F160S3;
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info->sector_count = 32;
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info->size = 0x00400000;
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break; /* => 2x2 MB */
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case (INTEL_ID_28F320S3):
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info->flash_id += FLASH_28F320S3;
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info->sector_count = 64;
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info->size = 0x00800000;
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break; /* => 2x4 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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return (0); /* => no or unknown flash */
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}
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/* set up sector start address table */
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base + (i * 0x00020000);
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/* don't know how to check sector protection */
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info->protect[i] = 0;
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}
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/*
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* Prevent writes to uninitialized FLASH.
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*/
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if (info->flash_id != FLASH_UNKNOWN) {
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addr = (vu_long *)info->start[0];
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*addr = 0xFFFFFF; /* reset bank to read array mode */
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}
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return (info->size);
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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int flag, prot, sect;
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ulong start, now, last;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect=s_first; sect<=s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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start = get_timer (0);
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last = start;
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect<=s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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vu_long *addr = (vu_long *)(info->start[sect]);
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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/* Single Block Erase Command */
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*addr = 0x20202020;
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/* Confirm */
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*addr = 0xD0D0D0D0;
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/* Resume Command, as per errata update */
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*addr = 0xD0D0D0D0;
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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while ((*addr & 0x00800080) != 0x00800080) {
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if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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*addr = 0xFFFFFFFF; /* reset bank */
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return 1;
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}
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/* show that we're waiting */
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if ((now - last) > 1000) { /* every second */
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putc ('.');
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last = now;
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}
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}
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/* reset to read mode */
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*addr = 0xFFFFFFFF;
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}
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}
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printf (" done\n");
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return 0;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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ulong cp, wp, data;
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int i, l, rc;
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wp = (addr & ~3); /* get lower word aligned address */
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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data = 0;
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for (i=0, cp=wp; i<l; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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for (; i<4 && cnt>0; ++i) {
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data = (data << 8) | *src++;
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--cnt;
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++cp;
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}
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for (; cnt==0 && i<4; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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if ((rc = write_word(info, wp, data)) != 0) {
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return (rc);
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}
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wp += 4;
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}
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/*
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* handle word aligned part
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*/
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while (cnt >= 4) {
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data = 0;
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for (i=0; i<4; ++i) {
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data = (data << 8) | *src++;
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}
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if ((rc = write_word(info, wp, data)) != 0) {
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return (rc);
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}
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wp += 4;
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cnt -= 4;
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}
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if (cnt == 0) {
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return (0);
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}
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/*
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* handle unaligned tail bytes
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*/
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data = 0;
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for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
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data = (data << 8) | *src++;
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--cnt;
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}
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for (; i<4; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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return (write_word(info, wp, data));
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}
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/*-----------------------------------------------------------------------
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* Write a word to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_word (flash_info_t *info, ulong dest, ulong data)
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{
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vu_long *addr = (vu_long *)dest;
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ulong start, csr;
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int flag;
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/* Check if Flash is (sufficiently) erased */
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if ((*addr & data) != data) {
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return (2);
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}
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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/* Write Command */
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*addr = 0x10101010;
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/* Write Data */
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*addr = data;
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* data polling for D7 */
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start = get_timer (0);
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flag = 0;
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while (((csr = *addr) & 0x00800080) != 0x00800080) {
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if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
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flag = 1;
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break;
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}
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}
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if (csr & 0x00400040) {
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printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
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flag = 1;
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}
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/* Clear Status Registers Command */
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*addr = 0x50505050;
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/* Reset to read array mode */
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*addr = 0xFFFFFFFF;
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return (flag);
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}
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/*-----------------------------------------------------------------------
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*/
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