upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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55 lines
1.4 KiB
55 lines
1.4 KiB
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* include/configs/alt.h
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* This file is alt board configuration.
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*/
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#ifndef __ALT_H
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#define __ALT_H
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#include "rcar-gen2-common.h"
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#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
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#define STACK_AREA_SIZE 0x00100000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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/* FLASH */
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#define CONFIG_SPI_FLASH_QUAD
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0"
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/* SPL support */
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#define CONFIG_SPL_TEXT_BASE 0xe6300000
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#define CONFIG_SPL_STACK 0xe6340000
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#define CONFIG_SPL_MAX_SIZE 0x4000
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_CONS_SCIF2
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#define CONFIG_SH_SCIF_CLK_FREQ 65000000
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#endif
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#endif /* __ALT_H */
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