upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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98 lines
2.3 KiB
98 lines
2.3 KiB
/*
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* (C) Copyright 2008-2010
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* Gražvydas Ignotas <notasas@gmail.com>
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*
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* Configuration settings for the OMAP3 Pandora.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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/* override base for compatibility with MLO the device ships with */
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#include <configs/ti_omap3_common.h>
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#define CONFIG_MISC_INIT_R
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#define CONFIG_REVISION_TAG 1
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_SYS_DEVICE_NULLDEV 1
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/*
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* Hardware drivers
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*/
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/* TWL4030 LED */
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#define CONFIG_TWL4030_LED
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/*
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* NS16550 Configuration
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*/
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#undef CONFIG_SYS_NS16550_CLK
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_SERIAL3 3
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/* commands to include */
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/*
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* Board NAND Info.
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*/
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
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/* to access nand */
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#ifdef CONFIG_NAND
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#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
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#endif
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#define CONFIG_BOOTCOMMAND \
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"run distro_bootcmd; " \
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"setenv bootargs ${bootargs_ubi}; " \
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"if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \
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"source ${loadaddr}; " \
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"fi; " \
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"ubi part boot && ubifsmount ubi:boot && " \
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"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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DEFAULT_LINUX_BOOT_ENV \
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"usbtty=cdc_acm\0" \
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"bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
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"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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BOOTENV \
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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0x01F00000) /* 31MB */
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#if defined(CONFIG_NAND)
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#define CONFIG_SYS_FLASH_BASE NAND_BASE
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#endif
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET 0x260000
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#define CONFIG_ENV_ADDR 0x260000
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#endif /* __CONFIG_H */
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