upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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60 lines
1.4 KiB
60 lines
1.4 KiB
/*
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* cmd_cplbinfo.c - dump the instruction/data cplb tables
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*
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* Copyright (c) 2007-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/blackfin.h>
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#include <asm/cplb.h>
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#include <asm/mach-common/bits/mpu.h>
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/*
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* Translate the PAGE_SIZE bits into a human string
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*/
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static const char *cplb_page_size(uint32_t data)
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{
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static const char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
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return page_size_string_table[(data & PAGE_SIZE_MASK) >> PAGE_SIZE_SHIFT];
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}
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/*
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* show a hardware cplb table
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*/
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static void show_cplb_table(uint32_t *addr, uint32_t *data)
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{
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int i;
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printf(" Address Data Size Valid Locked\n");
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for (i = 1; i <= 16; ++i) {
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printf(" %2i 0x%p 0x%05X %s %c %c\n",
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i, (void *)*addr, *data,
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cplb_page_size(*data),
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(*data & CPLB_VALID ? 'Y' : 'N'),
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(*data & CPLB_LOCK ? 'Y' : 'N'));
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++addr;
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++data;
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}
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}
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/*
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* display current instruction and data cplb tables
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*/
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int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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printf("%s CPLB table [%08x]:\n", "Instruction", *(uint32_t *)DMEM_CONTROL);
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show_cplb_table((uint32_t *)ICPLB_ADDR0, (uint32_t *)ICPLB_DATA0);
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printf("%s CPLB table [%08x]:\n", "Data", *(uint32_t *)IMEM_CONTROL);
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show_cplb_table((uint32_t *)DCPLB_ADDR0, (uint32_t *)DCPLB_DATA0);
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return 0;
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}
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U_BOOT_CMD(
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cplbinfo, 1, 0, do_cplbinfo,
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"display current CPLB tables",
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""
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);
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