upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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86 lines
1.6 KiB
86 lines
1.6 KiB
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*/
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#include <common.h>
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#include <dm.h>
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#include <spl.h>
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#include <asm/io.h>
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u32 spl_boot_device(void)
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{
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u32 boot_mode;
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boot_mode = (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_MODE_MASK) >>
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TAMP_BOOT_MODE_SHIFT;
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switch (boot_mode) {
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case BOOT_FLASH_SD_1:
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case BOOT_FLASH_EMMC_1:
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return BOOT_DEVICE_MMC1;
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case BOOT_FLASH_SD_2:
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case BOOT_FLASH_EMMC_2:
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return BOOT_DEVICE_MMC2;
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}
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return BOOT_DEVICE_MMC1;
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}
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u32 spl_boot_mode(const u32 boot_device)
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{
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return MMCSD_MODE_RAW;
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}
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int spl_boot_partition(const u32 boot_device)
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{
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switch (boot_device) {
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case BOOT_DEVICE_MMC1:
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return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;
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case BOOT_DEVICE_MMC2:
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return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2;
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default:
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return -EINVAL;
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}
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *dev;
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int ret;
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arch_cpu_init();
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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ret = uclass_get_device(UCLASS_CLK, 0, &dev);
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if (ret) {
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debug("Clock init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_RESET, 0, &dev);
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if (ret) {
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debug("Reset init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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return;
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}
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/* enable console uart printing */
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preloader_console_init();
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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}
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