upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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321 lines
9.5 KiB
321 lines
9.5 KiB
/*
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* (C) Copyright 2006-2008
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* Texas Instruments.
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <x0khasim@ti.com>
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*
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* Configuration settings for the TI OMAP3530 Beagle board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs. We use this rather than the inherited defines from
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* ti_armv7_common.h for backwards compatibility.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80100000
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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#include <configs/ti_omap3_common.h>
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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#define CONFIG_MISC_INIT_R
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#define CONFIG_REVISION_TAG 1
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#define CONFIG_ENV_OVERWRITE
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/* Status LED */
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#define CONFIG_STATUS_LED 1
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#define CONFIG_BOARD_SPECIFIC_LED 1
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#define STATUS_LED_BIT 0x01
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#define STATUS_LED_STATE STATUS_LED_ON
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_BIT1 0x02
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#define STATUS_LED_STATE1 STATUS_LED_ON
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#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_BOOT STATUS_LED_BIT
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#define STATUS_LED_GREEN STATUS_LED_BIT1
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/* Enable Multi Bus support for I2C */
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#define CONFIG_I2C_MULTI_BUS 1
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/* Probe all devices */
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#define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
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/* USB */
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#define CONFIG_MUSB_GADGET
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#define CONFIG_USB_MUSB_OMAP2PLUS
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#define CONFIG_MUSB_PIO_ONLY
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_TWL4030_USB 1
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETHER_RNDIS
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_VBUS_DRAW 0
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#define CONFIG_USBDOWNLOAD_GADGET
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#define CONFIG_G_DNL_VENDOR_NUM 0x0451
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#define CONFIG_G_DNL_PRODUCT_NUM 0xd022
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#define CONFIG_G_DNL_MANUFACTURER "TI"
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#define CONFIG_CMD_FASTBOOT
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#define CONFIG_ANDROID_BOOT_IMAGE
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#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
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#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000
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/* USB EHCI */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_OMAP
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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#define CONFIG_USB_ETHER_SMSC95XX
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/* GPIO banks */
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#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
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#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_CACHE
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#define MTDIDS_DEFAULT "nand0=nand"
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#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
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"1920k(u-boot),128k(u-boot-env),"\
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"4m(kernel),-(fs)"
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#define CONFIG_USB_STORAGE /* USB storage support */
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_LED /* LED support */
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#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
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#define CONFIG_CMD_GPIO /* Enable gpio command */
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#define CONFIG_CMD_DHCP
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#define CONFIG_VIDEO_OMAP3 /* DSS Support */
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/*
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* TWL4030
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*/
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#define CONFIG_TWL4030_LED 1
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/*
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* Board NAND Info.
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*/
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#define CONFIG_SYS_NAND_QUIET_TEST 1
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
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/* devices */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x80200000\0" \
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"rdaddr=0x81000000\0" \
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"fdt_high=0xffffffff\0" \
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"fdtaddr=0x80f80000\0" \
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"usbtty=cdc_acm\0" \
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"bootfile=uImage\0" \
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"ramdisk=ramdisk.gz\0" \
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"bootdir=/boot\0" \
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"bootpart=0:2\0" \
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"console=ttyO2,115200n8\0" \
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"mpurate=auto\0" \
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"buddy=none\0" \
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"optargs=\0" \
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"camera=none\0" \
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"vram=12M\0" \
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"dvimode=640x480MR-16@60\0" \
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"defaultdisplay=dvi\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext3 rootwait\0" \
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"nandroot=ubi0:rootfs ubi.mtd=4\0" \
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"nandrootfstype=ubifs\0" \
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"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
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"ramrootfstype=ext2\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"mpurate=${mpurate} " \
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"buddy=${buddy} "\
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"camera=${camera} "\
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"nandargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"mpurate=${mpurate} " \
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"buddy=${buddy} "\
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"camera=${camera} "\
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"findfdt=" \
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"if test $beaglerev = AxBx; then " \
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"setenv fdtfile omap3-beagle.dtb; fi; " \
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"if test $beaglerev = Cx; then " \
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"setenv fdtfile omap3-beagle.dtb; fi; " \
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"if test $beaglerev = C4; then " \
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"setenv fdtfile omap3-beagle.dtb; fi; " \
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"if test $beaglerev = xMAB; then " \
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"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
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"if test $beaglerev = xMC; then " \
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"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
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"if test $fdtfile = undefined; then " \
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"echo WARNING: Could not determine device tree to use; fi; \0" \
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"validatefdt=" \
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"if test $beaglerev = xMAB; then " \
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"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
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"setenv fdtfile omap3-beagle-xm.dtb; " \
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"fi; " \
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"fi; \0" \
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"bootenv=uEnv.txt\0" \
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"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t -r $loadaddr $filesize\0" \
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"ramargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"mpurate=${mpurate} " \
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"buddy=${buddy} "\
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${ramroot} " \
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"rootfstype=${ramrootfstype}\0" \
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"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
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"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
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"source ${loadaddr}\0" \
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"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
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"run mmcargs; " \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${loadaddr} 280000 400000; " \
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"bootm ${loadaddr}\0" \
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"ramboot=echo Booting from ramdisk ...; " \
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"run ramargs; " \
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"bootm ${loadaddr}\0" \
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"userbutton=if gpio input 173; then run userbutton_xm; " \
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"else run userbutton_nonxm; fi;\0" \
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"userbutton_xm=gpio input 4;\0" \
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"userbutton_nonxm=gpio input 7;\0"
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/* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
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#define CONFIG_BOOTCOMMAND \
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"run findfdt; " \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run userbutton; then " \
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"setenv bootenv uEnv.txt;" \
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"else " \
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"setenv bootenv user.txt;" \
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"fi;" \
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"echo SD/MMC found on device ${mmcdev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot;" \
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"fi;" \
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"fi; " \
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"fi;" \
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"run nandboot;" \
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"setenv bootfile zImage;" \
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"if run loadimage; then " \
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"run loadfdt;" \
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"run mmcbootz; " \
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"fi; " \
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/* **** PISMO SUPPORT *** */
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#if defined(CONFIG_CMD_NAND)
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#define CONFIG_SYS_FLASH_BASE NAND_BASE
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#endif
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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#define CONFIG_OMAP3_SPI
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#define CONFIG_SYS_CACHELINE_SIZE 64
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/* Defines for SPL */
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#define CONFIG_SPL_OMAP3_ID_NAND
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/* NAND boot config */
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#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
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10, 11, 12, 13}
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_CMD_SPL_NAND_OFS 0x240000
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* __CONFIG_H */
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