upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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76 lines
1.2 KiB
76 lines
1.2 KiB
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra20 Whistler evaluation board";
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compatible = "nvidia,whistler", "nvidia,tegra20";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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i2c0 = "/i2c@7000d000";
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usb0 = "/usb@c5008000";
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sdhci0 = "/sdhci@c8000600";
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sdhci1 = "/sdhci@c8000400";
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};
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memory {
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device_type = "memory";
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reg = < 0x00000000 0x20000000 >;
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};
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serial@70006000 {
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clock-frequency = < 216000000 >;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <100000>;
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pmic@3c {
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compatible = "maxim,max8907b";
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reg = <0x3c>;
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clk_32k: clock {
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compatible = "fixed-clock";
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/*
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* leave out for now due to CPP:
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* #clock-cells = <0>;
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*/
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clock-frequency = <32768>;
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};
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};
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};
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usb@c5008000 {
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status = "okay";
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};
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sdhci@c8000400 {
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status = "okay";
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wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
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bus-width = <8>;
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};
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sdhci@c8000600 {
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status = "okay";
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bus-width = <8>;
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg=<0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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};
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