upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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48 lines
1.3 KiB
48 lines
1.3 KiB
/*
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* (C) Copyright 2014
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* Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/io.h>
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#include <asm/arch/stv0991_creg.h>
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#include <asm/arch/stv0991_periph.h>
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#include <asm/arch/hardware.h>
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static struct stv0991_creg *const stv0991_creg = \
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(struct stv0991_creg *)CREG_BASE_ADDR;
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int stv0991_pinmux_config(int peripheral)
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{
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switch (peripheral) {
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case UART_GPIOC_30_31:
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/* SSDA/SSCL pad muxing to UART Rx/Dx */
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writel((readl(&stv0991_creg->mux12) & GPIOC_31_MUX_MASK) |
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CFG_GPIOC_31_UART_RX,
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&stv0991_creg->mux12);
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writel((readl(&stv0991_creg->mux12) & GPIOC_30_MUX_MASK) |
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CFG_GPIOC_30_UART_TX,
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&stv0991_creg->mux12);
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/* SSDA/SSCL pad config to push pull*/
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writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_31_MODE_MASK) |
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CFG_GPIOC_31_MODE_PP,
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&stv0991_creg->cfg_pad6);
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writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_30_MODE_MASK) |
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CFG_GPIOC_30_MODE_HIGH,
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&stv0991_creg->cfg_pad6);
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break;
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case UART_GPIOB_16_17:
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/* ethernet rx_6/7 to UART Rx/Dx */
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writel((readl(&stv0991_creg->mux7) & GPIOB_17_MUX_MASK) |
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CFG_GPIOB_17_UART_RX,
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&stv0991_creg->mux7);
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writel((readl(&stv0991_creg->mux7) & GPIOB_16_MUX_MASK) |
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CFG_GPIOB_16_UART_TX,
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&stv0991_creg->mux7);
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break;
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default:
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break;
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}
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return 0;
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}
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