upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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58 lines
1.7 KiB
58 lines
1.7 KiB
/*
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* (C) Copyright 2014
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* Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_STV0991_H
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#define __CONFIG_STV0991_H
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SYS_CORTEX_R4
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#define CONFIG_SYS_GENERIC_BOARD
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#define CONFIG_SYS_NO_FLASH
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/* ram memory-related information */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x00000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define PHYS_SDRAM_1_SIZE 0x00198000
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#define CONFIG_ENV_SIZE 0x10000
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR \
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(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
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/* serial port (PL011) configuration */
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#define CONFIG_SYS_SERIAL0 0x80406000
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#define CONFIG_PL011_SERIAL
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0}
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#define CONFIG_PL011_CLOCK (2700 * 1000)
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/* user interface */
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#define CONFIG_SYS_PROMPT "STV0991> "
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#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+sizeof(CONFIG_SYS_PROMPT) + 16)
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/* MISC */
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#define CONFIG_SYS_LOAD_ADDR 0x00000000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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/* U-boot Load Address */
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#define CONFIG_SYS_TEXT_BASE 0x00010000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#endif /* __CONFIG_H */
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