upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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416 lines
10 KiB
416 lines
10 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2007, 2010-2011 Freescale Semiconductor, Inc.
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* Authors: York Sun <yorksun@freescale.com>
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* Timur Tabi <timur@freescale.com>
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*
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* FSL DIU Framebuffer driver
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*/
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#include <common.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include "videomodes.h"
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#include <video_fb.h>
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#include <fsl_diu_fb.h>
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#include <linux/list.h>
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#include <linux/fb.h>
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/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
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static struct fb_videomode fsl_diu_mode_800_480 = {
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.name = "800x480-60",
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.refresh = 60,
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.xres = 800,
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.yres = 480,
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.pixclock = 31250,
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.left_margin = 86,
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.right_margin = 42,
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.upper_margin = 33,
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.lower_margin = 10,
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.hsync_len = 128,
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.vsync_len = 2,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED
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};
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/* For the SHARP LQ084S3LG01, used on the P1022DS board */
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static struct fb_videomode fsl_diu_mode_800_600 = {
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.name = "800x600-60",
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.refresh = 60,
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.xres = 800,
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.yres = 600,
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.pixclock = 25000,
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.left_margin = 88,
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.right_margin = 40,
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.upper_margin = 23,
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.lower_margin = 1,
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.hsync_len = 128,
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.vsync_len = 4,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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/*
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* These parameters give default parameters
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* for video output 1024x768,
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* FIXME - change timing to proper amounts
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* hsync 31.5kHz, vsync 60Hz
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*/
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static struct fb_videomode fsl_diu_mode_1024_768 = {
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.name = "1024x768-60",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 160,
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.right_margin = 24,
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.upper_margin = 29,
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.lower_margin = 3,
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.hsync_len = 136,
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.vsync_len = 6,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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static struct fb_videomode fsl_diu_mode_1280_1024 = {
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.name = "1280x1024-60",
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.refresh = 60,
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.xres = 1280,
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.yres = 1024,
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.pixclock = 9375,
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.left_margin = 38,
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.right_margin = 128,
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.upper_margin = 2,
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.lower_margin = 7,
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.hsync_len = 216,
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.vsync_len = 37,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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static struct fb_videomode fsl_diu_mode_1280_720 = {
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.name = "1280x720-60",
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.refresh = 60,
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.xres = 1280,
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.yres = 720,
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.pixclock = 13426,
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.left_margin = 192,
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.right_margin = 64,
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.upper_margin = 22,
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.lower_margin = 1,
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.hsync_len = 136,
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.vsync_len = 3,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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static struct fb_videomode fsl_diu_mode_1920_1080 = {
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.name = "1920x1080-60",
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.refresh = 60,
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.xres = 1920,
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.yres = 1080,
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.pixclock = 5787,
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.left_margin = 328,
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.right_margin = 120,
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.upper_margin = 34,
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.lower_margin = 1,
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.hsync_len = 208,
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.vsync_len = 3,
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.sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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/*
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* These are the fields of area descriptor(in DDR memory) for every plane
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*/
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struct diu_ad {
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/* Word 0(32-bit) in DDR memory */
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__le32 pix_fmt; /* hard coding pixel format */
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/* Word 1(32-bit) in DDR memory */
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__le32 addr;
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/* Word 2(32-bit) in DDR memory */
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__le32 src_size_g_alpha;
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/* Word 3(32-bit) in DDR memory */
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__le32 aoi_size;
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/* Word 4(32-bit) in DDR memory */
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__le32 offset_xyi;
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/* Word 5(32-bit) in DDR memory */
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__le32 offset_xyd;
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/* Word 6(32-bit) in DDR memory */
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__le32 ckmax_r:8;
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__le32 ckmax_g:8;
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__le32 ckmax_b:8;
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__le32 res9:8;
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/* Word 7(32-bit) in DDR memory */
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__le32 ckmin_r:8;
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__le32 ckmin_g:8;
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__le32 ckmin_b:8;
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__le32 res10:8;
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/* Word 8(32-bit) in DDR memory */
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__le32 next_ad;
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/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
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__le32 res[3];
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} __attribute__ ((packed));
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/*
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* DIU register map
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*/
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struct diu {
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__be32 desc[3];
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__be32 gamma;
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__be32 pallete;
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__be32 cursor;
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__be32 curs_pos;
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__be32 diu_mode;
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__be32 bgnd;
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__be32 bgnd_wb;
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__be32 disp_size;
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__be32 wb_size;
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__be32 wb_mem_addr;
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__be32 hsyn_para;
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__be32 vsyn_para;
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__be32 syn_pol;
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__be32 thresholds;
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__be32 int_status;
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__be32 int_mask;
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__be32 colorbar[8];
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__be32 filling;
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__be32 plut;
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} __attribute__ ((packed));
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struct diu_addr {
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void *vaddr; /* Virtual address */
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u32 paddr; /* 32-bit physical address */
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unsigned int offset; /* Alignment offset */
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};
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static struct fb_info info;
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/*
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* Align to 64-bit(8-byte), 32-byte, etc.
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*/
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static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
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{
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u32 offset, ssize;
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u32 mask;
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ssize = size + bytes_align;
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buf->vaddr = malloc(ssize);
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if (!buf->vaddr)
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return -1;
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memset(buf->vaddr, 0, ssize);
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mask = bytes_align - 1;
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offset = (u32)buf->vaddr & mask;
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if (offset) {
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buf->offset = bytes_align - offset;
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buf->vaddr += offset;
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} else
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buf->offset = 0;
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buf->paddr = virt_to_phys(buf->vaddr);
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return 0;
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}
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/*
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* Allocate a framebuffer and an Area Descriptor that points to it. Both
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* are created in the same memory block. The Area Descriptor is updated to
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* point to the framebuffer memory. Memory is aligned as needed.
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*/
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static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres,
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unsigned int depth, char **fb)
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{
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unsigned long size = xres * yres * depth;
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struct diu_addr addr;
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struct diu_ad *ad;
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size_t ad_size = roundup(sizeof(struct diu_ad), 32);
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/*
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* Allocate a memory block that holds the Area Descriptor and the
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* frame buffer right behind it. To keep the code simple, everything
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* is aligned on a 32-byte address.
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*/
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if (allocate_buf(&addr, ad_size + size, 32) < 0)
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return NULL;
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ad = addr.vaddr;
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ad->addr = cpu_to_le32(addr.paddr + ad_size);
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ad->aoi_size = cpu_to_le32((yres << 16) | xres);
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ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres);
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ad->offset_xyi = 0;
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ad->offset_xyd = 0;
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if (fb)
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*fb = addr.vaddr + ad_size;
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return ad;
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}
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int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix)
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{
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struct fb_videomode *fsl_diu_mode_db;
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struct diu_ad *ad;
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struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR;
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u8 *gamma_table_base;
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unsigned int i, j;
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struct diu_addr gamma;
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struct diu_addr cursor;
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/* Convert the X,Y resolution pair into a single number */
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#define RESOLUTION(x, y) (((u32)(x) << 16) | (y))
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switch (RESOLUTION(xres, yres)) {
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case RESOLUTION(800, 480):
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fsl_diu_mode_db = &fsl_diu_mode_800_480;
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break;
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case RESOLUTION(800, 600):
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fsl_diu_mode_db = &fsl_diu_mode_800_600;
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break;
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case RESOLUTION(1024, 768):
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fsl_diu_mode_db = &fsl_diu_mode_1024_768;
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break;
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case RESOLUTION(1280, 1024):
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fsl_diu_mode_db = &fsl_diu_mode_1280_1024;
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break;
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case RESOLUTION(1280, 720):
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fsl_diu_mode_db = &fsl_diu_mode_1280_720;
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break;
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case RESOLUTION(1920, 1080):
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fsl_diu_mode_db = &fsl_diu_mode_1920_1080;
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break;
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default:
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printf("DIU: Unsupported resolution %ux%u\n", xres, yres);
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return -1;
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}
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/* read mode info */
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info.var.xres = fsl_diu_mode_db->xres;
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info.var.yres = fsl_diu_mode_db->yres;
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info.var.bits_per_pixel = 32;
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info.var.pixclock = fsl_diu_mode_db->pixclock;
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info.var.left_margin = fsl_diu_mode_db->left_margin;
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info.var.right_margin = fsl_diu_mode_db->right_margin;
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info.var.upper_margin = fsl_diu_mode_db->upper_margin;
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info.var.lower_margin = fsl_diu_mode_db->lower_margin;
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info.var.hsync_len = fsl_diu_mode_db->hsync_len;
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info.var.vsync_len = fsl_diu_mode_db->vsync_len;
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info.var.sync = fsl_diu_mode_db->sync;
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info.var.vmode = fsl_diu_mode_db->vmode;
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info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8;
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/* Memory allocation for framebuffer */
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info.screen_size =
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info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
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ad = allocate_fb(info.var.xres, info.var.yres,
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info.var.bits_per_pixel / 8, &info.screen_base);
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if (!ad) {
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printf("DIU: Out of memory\n");
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return -1;
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}
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ad->pix_fmt = pixel_format;
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/* Disable chroma keying function */
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ad->ckmax_r = 0;
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ad->ckmax_g = 0;
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ad->ckmax_b = 0;
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ad->ckmin_r = 255;
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ad->ckmin_g = 255;
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ad->ckmin_b = 255;
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/* Initialize the gamma table */
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if (allocate_buf(&gamma, 256 * 3, 32) < 0) {
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printf("DIU: Out of memory\n");
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return -1;
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}
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gamma_table_base = gamma.vaddr;
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for (i = 0; i <= 2; i++)
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for (j = 0; j < 256; j++)
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*gamma_table_base++ = j;
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if (gamma_fix == 1) { /* fix the gamma */
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gamma_table_base = gamma.vaddr;
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for (i = 0; i < 256 * 3; i++) {
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gamma_table_base[i] = (gamma_table_base[i] << 2)
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| ((gamma_table_base[i] >> 6) & 0x03);
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}
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}
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/* Initialize the cursor */
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if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) {
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printf("DIU: Can't alloc cursor data\n");
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return -1;
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}
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/* Program DIU registers */
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out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */
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out_be32(&hw->gamma, gamma.paddr);
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out_be32(&hw->cursor, cursor.paddr);
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out_be32(&hw->bgnd, 0x007F7F7F);
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out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres);
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out_be32(&hw->hsyn_para, info.var.left_margin << 22 |
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info.var.hsync_len << 11 |
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info.var.right_margin);
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out_be32(&hw->vsyn_para, info.var.upper_margin << 22 |
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info.var.vsync_len << 11 |
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info.var.lower_margin);
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/* Pixel Clock configuration */
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diu_set_pixel_clock(info.var.pixclock);
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/* Set the frame buffers */
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out_be32(&hw->desc[0], virt_to_phys(ad));
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out_be32(&hw->desc[1], 0);
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out_be32(&hw->desc[2], 0);
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/* Enable the DIU, set display to all three planes */
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out_be32(&hw->diu_mode, 1);
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return 0;
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}
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void *video_hw_init(void)
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{
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static GraphicDevice ctfb;
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const char *options;
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unsigned int depth = 0, freq = 0;
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if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq,
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&options))
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return NULL;
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/* Find the monitor port, which is a required option */
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if (!options)
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return NULL;
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if (strncmp(options, "monitor=", 8) != 0)
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return NULL;
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if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0)
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return NULL;
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/* fill in Graphic device struct */
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sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
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ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq);
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ctfb.frameAdrs = (unsigned int)info.screen_base;
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ctfb.plnSizeX = ctfb.winSizeX;
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ctfb.plnSizeY = ctfb.winSizeY;
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ctfb.gdfBytesPP = 4;
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ctfb.gdfIndex = GDF_32BIT_X888RGB;
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ctfb.isaBase = 0;
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ctfb.pciBase = 0;
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ctfb.memSize = info.screen_size;
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/* Cursor Start Address */
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ctfb.dprBase = 0;
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ctfb.vprBase = 0;
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ctfb.cprBase = 0;
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return &ctfb;
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}
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