upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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73 lines
1.3 KiB
73 lines
1.3 KiB
/*
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* Copyright (C) 1996, 99, 2003 by Ralf Baechle
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _ASM_BYTEORDER_H
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#define _ASM_BYTEORDER_H
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#include <asm/types.h>
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#ifdef __GNUC__
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#ifdef CONFIG_CPU_MIPSR2
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static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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{
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__asm__(
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" wsbh %0, %1 \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch__swab16(x) ___arch__swab16(x)
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static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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{
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__asm__(
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" wsbh %0, %1 \n"
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" rotr %0, %0, 16 \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch__swab32(x) ___arch__swab32(x)
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#ifdef CONFIG_CPU_MIPS64_R2
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static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
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{
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__asm__(
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" dsbh %0, %1 \n"
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" dshd %0, %0 \n"
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" drotr %0, %0, 32 \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch__swab64(x) ___arch__swab64(x)
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#endif /* CONFIG_CPU_MIPS64_R2 */
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#endif /* CONFIG_CPU_MIPSR2 */
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#endif /* __GNUC__ */
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#if defined(__MIPSEB__)
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# include <linux/byteorder/big_endian.h>
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#elif defined(__MIPSEL__)
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# include <linux/byteorder/little_endian.h>
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#else
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# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
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#endif
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#endif /* _ASM_BYTEORDER_H */
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