upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
94 lines
1.7 KiB
94 lines
1.7 KiB
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2016 Freescale Semiconductor, Inc.
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <i2c.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/fsl_serdes.h>
|
|
#ifdef CONFIG_FSL_LS_PPA
|
|
#include <asm/arch/ppa.h>
|
|
#endif
|
|
#include <asm/arch/mmu.h>
|
|
#include <asm/arch/soc.h>
|
|
#include <hwconfig.h>
|
|
#include <environment.h>
|
|
#include <fsl_mmdc.h>
|
|
#include <netdev.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
int checkboard(void)
|
|
{
|
|
puts("Board: LS1012AFRDM ");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int dram_init(void)
|
|
{
|
|
static const struct fsl_mmdc_info mparam = {
|
|
0x04180000, /* mdctl */
|
|
0x00030035, /* mdpdc */
|
|
0x12554000, /* mdotc */
|
|
0xbabf7954, /* mdcfg0 */
|
|
0xdb328f64, /* mdcfg1 */
|
|
0x01ff00db, /* mdcfg2 */
|
|
0x00001680, /* mdmisc */
|
|
0x0f3c8000, /* mdref */
|
|
0x00002000, /* mdrwd */
|
|
0x00bf1023, /* mdor */
|
|
0x0000003f, /* mdasp */
|
|
0x0000022a, /* mpodtctrl */
|
|
0xa1390003, /* mpzqhwctrl */
|
|
};
|
|
|
|
mmdc_init(&mparam);
|
|
|
|
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
|
|
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
|
|
/* This will break-before-make MMU for DDR */
|
|
update_early_mmu_table();
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
int board_early_init_f(void)
|
|
{
|
|
fsl_lsch2_early_init_f();
|
|
|
|
return 0;
|
|
}
|
|
|
|
int board_init(void)
|
|
{
|
|
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
|
|
CONFIG_SYS_CCI400_OFFSET);
|
|
|
|
/*
|
|
* Set CCI-400 control override register to enable barrier
|
|
* transaction
|
|
*/
|
|
out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
|
|
|
|
#ifdef CONFIG_ENV_IS_NOWHERE
|
|
gd->env_addr = (ulong)&default_environment[0];
|
|
#endif
|
|
|
|
#ifdef CONFIG_FSL_LS_PPA
|
|
ppa_init();
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
int ft_board_setup(void *blob, bd_t *bd)
|
|
{
|
|
arch_fixup_fdt(blob);
|
|
|
|
ft_cpu_setup(blob, bd);
|
|
|
|
return 0;
|
|
}
|
|
|