upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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44 lines
1018 B
44 lines
1018 B
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2017 NXP
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*/
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#define ETH_1_1G_BUS_ID 0x1
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#define ETH_1_1G_PHY_ID 0x1e
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#define ETH_1_1G_MDIO_MUX 0x2
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#define ETH_1G_MDIO_PHY_MASK 0xBFFFFFFD
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#define ETH_1_1G_PHY_MODE "sgmii"
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#define ETH_2_1G_BUS_ID 0x1
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#define ETH_2_1G_PHY_ID 0x1
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#define ETH_2_1G_MDIO_MUX 0x1
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#define ETH_2_1G_PHY_MODE "rgmii"
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#define ETH_1_2_5G_BUS_ID 0x0
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#define ETH_1_2_5G_PHY_ID 0x1
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#define ETH_1_2_5G_MDIO_MUX 0x2
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#define ETH_2_5G_MDIO_PHY_MASK 0xFFFFFFF9
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#define ETH_2_5G_PHY_MODE "sgmii-2500"
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#define ETH_2_2_5G_BUS_ID 0x1
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#define ETH_2_2_5G_PHY_ID 0x2
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#define ETH_2_2_5G_MDIO_MUX 0x3
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#define SERDES_1_G_PROTOCOL 0x3508
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#define SERDES_2_5_G_PROTOCOL 0x2205
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#define PFE_PROP_LEN 4
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#define ETH_1_PATH "/pfe@04000000/ethernet@0"
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#define ETH_1_MDIO ETH_1_PATH "/mdio@0"
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#define ETH_2_PATH "/pfe@04000000/ethernet@1"
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#define ETH_2_MDIO ETH_2_PATH "/mdio@0"
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#define NUM_ETH_NODE 2
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struct pfe_prop_val {
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int busid;
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int phyid;
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int mux_val;
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int phy_mask;
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char *phy_mode;
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};
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