upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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116 lines
2.9 KiB
116 lines
2.9 KiB
/*-
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* Copyright (c) 2007-2008, Juniper Networks, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <errno.h>
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#include <pci.h>
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#include <usb.h>
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#include "ehci.h"
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#ifdef CONFIG_PCI_EHCI_DEVICE
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static struct pci_device_id ehci_pci_ids[] = {
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/* Please add supported PCI EHCI controller ids here */
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{0x1033, 0x00E0}, /* NEC */
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{0x10B9, 0x5239}, /* ULI1575 PCI EHCI module ids */
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{0x12D8, 0x400F}, /* Pericom */
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{0, 0}
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};
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#else
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static pci_dev_t ehci_find_class(int index)
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{
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int bus;
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int devnum;
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pci_dev_t bdf;
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uint32_t class;
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for (bus = 0; bus <= pci_last_busno(); bus++) {
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for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++) {
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pci_read_config_dword(PCI_BDF(bus, devnum, 0),
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PCI_CLASS_REVISION, &class);
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if (class >> 16 == 0xffff)
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continue;
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for (bdf = PCI_BDF(bus, devnum, 0);
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bdf <= PCI_BDF(bus, devnum,
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PCI_MAX_PCI_FUNCTIONS - 1);
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bdf += PCI_BDF(0, 0, 1)) {
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pci_read_config_dword(bdf, PCI_CLASS_REVISION,
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&class);
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if ((class >> 8 == PCI_CLASS_SERIAL_USB_EHCI)
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&& !index--)
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return bdf;
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}
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}
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}
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return -ENODEV;
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}
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#endif
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*/
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int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr,
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struct ehci_hcor **ret_hcor)
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{
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pci_dev_t pdev;
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uint32_t cmd;
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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#ifdef CONFIG_PCI_EHCI_DEVICE
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pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
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#else
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pdev = ehci_find_class(index);
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#endif
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if (pdev < 0) {
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printf("EHCI host controller not found\n");
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return -1;
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}
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hccr = (struct ehci_hccr *)pci_map_bar(pdev,
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PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
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hcor = (struct ehci_hcor *)((uint32_t) hccr +
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HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
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(uint32_t)hccr, (uint32_t)hcor,
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(uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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*ret_hccr = hccr;
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*ret_hcor = hcor;
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/* enable busmaster */
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pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_MASTER;
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pci_write_config_dword(pdev, PCI_COMMAND, cmd);
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return 0;
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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{
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return 0;
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}
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