upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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592 lines
14 KiB
592 lines
14 KiB
/*
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* (C) Copyright 2001
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* This provides a bit-banged interface to the ethernet MII management
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* channel.
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <phy.h>
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#include <asm/types.h>
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#include <linux/list.h>
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#include <malloc.h>
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#include <net.h>
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/* local debug macro */
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#undef MII_DEBUG
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#undef debug
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#ifdef MII_DEBUG
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#define debug(fmt, args...) printf(fmt, ##args)
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#else
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#define debug(fmt, args...)
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#endif /* MII_DEBUG */
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static struct list_head mii_devs;
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static struct mii_dev *current_mii;
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/*
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* Lookup the mii_dev struct by the registered device name.
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*/
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struct mii_dev *miiphy_get_dev_by_name(const char *devname)
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{
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struct list_head *entry;
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struct mii_dev *dev;
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if (!devname) {
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printf("NULL device name!\n");
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return NULL;
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}
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list_for_each(entry, &mii_devs) {
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dev = list_entry(entry, struct mii_dev, link);
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if (strcmp(dev->name, devname) == 0)
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return dev;
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}
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return NULL;
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}
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/*****************************************************************************
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*
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* Initialize global data. Need to be called before any other miiphy routine.
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*/
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void miiphy_init(void)
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{
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INIT_LIST_HEAD(&mii_devs);
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current_mii = NULL;
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}
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static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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unsigned short val;
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int ret;
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struct legacy_mii_dev *ldev = bus->priv;
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ret = ldev->read(bus->name, addr, reg, &val);
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return ret ? -1 : (int)val;
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}
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static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
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int reg, u16 val)
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{
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struct legacy_mii_dev *ldev = bus->priv;
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return ldev->write(bus->name, addr, reg, val);
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}
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/*****************************************************************************
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*
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* Register read and write MII access routines for the device <name>.
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*/
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void miiphy_register(const char *name,
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int (*read)(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value),
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int (*write)(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value))
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{
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struct mii_dev *new_dev;
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struct legacy_mii_dev *ldev;
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unsigned int name_len;
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/* check if we have unique name */
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new_dev = miiphy_get_dev_by_name(name);
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if (new_dev) {
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printf("miiphy_register: non unique device name '%s'\n", name);
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return;
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}
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/* allocate memory */
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name_len = strlen(name);
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if (name_len > MDIO_NAME_LEN - 1) {
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/* Hopefully this won't happen, but if it does, we'll know */
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printf("miiphy_register: MDIO name was longer than %d\n",
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MDIO_NAME_LEN);
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return;
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}
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new_dev = mdio_alloc();
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ldev = malloc(sizeof(*ldev));
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if (new_dev == NULL || ldev == NULL) {
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printf("miiphy_register: cannot allocate memory for '%s'\n",
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name);
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return;
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}
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/* initalize mii_dev struct fields */
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new_dev->read = legacy_miiphy_read;
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new_dev->write = legacy_miiphy_write;
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sprintf(new_dev->name, name);
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ldev->read = read;
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ldev->write = write;
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new_dev->priv = ldev;
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debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
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new_dev->name, ldev->read, ldev->write);
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/* add it to the list */
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list_add_tail(&new_dev->link, &mii_devs);
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if (!current_mii)
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current_mii = new_dev;
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}
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struct mii_dev *mdio_alloc(void)
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{
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struct mii_dev *bus;
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bus = malloc(sizeof(*bus));
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if (!bus)
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return bus;
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memset(bus, 0, sizeof(*bus));
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/* initalize mii_dev struct fields */
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INIT_LIST_HEAD(&bus->link);
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return bus;
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}
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int mdio_register(struct mii_dev *bus)
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{
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if (!bus || !bus->name || !bus->read || !bus->write)
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return -1;
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/* check if we have unique name */
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if (miiphy_get_dev_by_name(bus->name)) {
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printf("mdio_register: non unique device name '%s'\n",
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bus->name);
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return -1;
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}
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/* add it to the list */
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list_add_tail(&bus->link, &mii_devs);
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if (!current_mii)
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current_mii = bus;
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return 0;
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}
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void mdio_list_devices(void)
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{
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struct list_head *entry;
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list_for_each(entry, &mii_devs) {
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int i;
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struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
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printf("%s:\n", bus->name);
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for (i = 0; i < PHY_MAX_ADDR; i++) {
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struct phy_device *phydev = bus->phymap[i];
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if (phydev) {
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printf("%d - %s", i, phydev->drv->name);
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if (phydev->dev)
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printf(" <--> %s\n", phydev->dev->name);
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else
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printf("\n");
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}
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}
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}
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}
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int miiphy_set_current_dev(const char *devname)
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{
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struct mii_dev *dev;
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dev = miiphy_get_dev_by_name(devname);
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if (dev) {
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current_mii = dev;
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return 0;
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}
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printf("No such device: %s\n", devname);
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return 1;
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}
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struct mii_dev *mdio_get_current_dev(void)
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{
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return current_mii;
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}
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struct phy_device *mdio_phydev_for_ethname(const char *ethname)
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{
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struct list_head *entry;
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struct mii_dev *bus;
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list_for_each(entry, &mii_devs) {
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int i;
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bus = list_entry(entry, struct mii_dev, link);
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for (i = 0; i < PHY_MAX_ADDR; i++) {
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if (!bus->phymap[i] || !bus->phymap[i]->dev)
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continue;
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if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
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return bus->phymap[i];
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}
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}
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printf("%s is not a known ethernet\n", ethname);
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return NULL;
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}
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const char *miiphy_get_current_dev(void)
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{
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if (current_mii)
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return current_mii->name;
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return NULL;
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}
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static struct mii_dev *miiphy_get_active_dev(const char *devname)
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{
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/* If the current mii is the one we want, return it */
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if (current_mii)
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if (strcmp(current_mii->name, devname) == 0)
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return current_mii;
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/* Otherwise, set the active one to the one we want */
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if (miiphy_set_current_dev(devname))
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return NULL;
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else
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return current_mii;
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}
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/*****************************************************************************
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*
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* Read to variable <value> from the PHY attached to device <devname>,
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* use PHY address <addr> and register <reg>.
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*
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* Returns:
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* 0 on success
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*/
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int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short *value)
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{
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struct mii_dev *bus;
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bus = miiphy_get_active_dev(devname);
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if (bus)
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*value = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
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else
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return 1;
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return (*value < 0) ? 1 : 0;
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}
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/*****************************************************************************
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*
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* Write <value> to the PHY attached to device <devname>,
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* use PHY address <addr> and register <reg>.
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*
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* Returns:
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* 0 on success
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*/
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int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short value)
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{
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struct mii_dev *bus;
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bus = miiphy_get_active_dev(devname);
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if (bus)
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return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
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return 1;
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}
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/*****************************************************************************
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*
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* Print out list of registered MII capable devices.
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*/
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void miiphy_listdev(void)
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{
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struct list_head *entry;
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struct mii_dev *dev;
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puts("MII devices: ");
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list_for_each(entry, &mii_devs) {
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dev = list_entry(entry, struct mii_dev, link);
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printf("'%s' ", dev->name);
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}
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puts("\n");
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if (current_mii)
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printf("Current device: '%s'\n", current_mii->name);
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}
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/*****************************************************************************
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*
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* Read the OUI, manufacture's model number, and revision number.
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*
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* OUI: 22 bits (unsigned int)
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* Model: 6 bits (unsigned char)
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* Revision: 4 bits (unsigned char)
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*
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* Returns:
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* 0 on success
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*/
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int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
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unsigned char *model, unsigned char *rev)
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{
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unsigned int reg = 0;
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unsigned short tmp;
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if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
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debug("PHY ID register 2 read failed\n");
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return -1;
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}
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reg = tmp;
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debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
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if (reg == 0xFFFF) {
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/* No physical device present at this address */
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return -1;
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}
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if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
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debug("PHY ID register 1 read failed\n");
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return -1;
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}
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reg |= tmp << 16;
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debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
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*oui = (reg >> 10);
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*model = (unsigned char)((reg >> 4) & 0x0000003F);
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*rev = (unsigned char)(reg & 0x0000000F);
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return 0;
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}
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#ifndef CONFIG_PHYLIB
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/*****************************************************************************
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*
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* Reset the PHY.
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* Returns:
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* 0 on success
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*/
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int miiphy_reset(const char *devname, unsigned char addr)
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{
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unsigned short reg;
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int timeout = 500;
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if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
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debug("PHY status read failed\n");
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return -1;
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}
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if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
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debug("PHY reset failed\n");
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return -1;
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}
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#ifdef CONFIG_PHY_RESET_DELAY
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udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
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#endif
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/*
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* Poll the control register for the reset bit to go to 0 (it is
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* auto-clearing). This should happen within 0.5 seconds per the
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* IEEE spec.
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*/
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reg = 0x8000;
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while (((reg & 0x8000) != 0) && timeout--) {
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if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) {
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debug("PHY status read failed\n");
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return -1;
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}
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udelay(1000);
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}
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if ((reg & 0x8000) == 0) {
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return 0;
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} else {
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puts("PHY reset timed out\n");
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return -1;
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}
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return 0;
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}
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#endif /* !PHYLIB */
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/*****************************************************************************
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*
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* Determine the ethernet speed (10/100/1000). Return 10 on error.
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*/
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int miiphy_speed(const char *devname, unsigned char addr)
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{
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u16 bmcr, anlpar;
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#if defined(CONFIG_PHY_GIGE)
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u16 btsr;
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/*
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* Check for 1000BASE-X. If it is supported, then assume that the speed
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* is 1000.
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*/
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if (miiphy_is_1000base_x(devname, addr))
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return _1000BASET;
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/*
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* No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
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*/
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/* Check for 1000BASE-T. */
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if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
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printf("PHY 1000BT status");
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goto miiphy_read_failed;
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}
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if (btsr != 0xFFFF &&
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(btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
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return _1000BASET;
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#endif /* CONFIG_PHY_GIGE */
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/* Check Basic Management Control Register first. */
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if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
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printf("PHY speed");
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goto miiphy_read_failed;
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}
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/* Check if auto-negotiation is on. */
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if (bmcr & BMCR_ANENABLE) {
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/* Get auto-negotiation results. */
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if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
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printf("PHY AN speed");
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goto miiphy_read_failed;
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}
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return (anlpar & LPA_100) ? _100BASET : _10BASET;
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}
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/* Get speed from basic control settings. */
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return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
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miiphy_read_failed:
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printf(" read failed, assuming 10BASE-T\n");
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return _10BASET;
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}
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/*****************************************************************************
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*
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* Determine full/half duplex. Return half on error.
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*/
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int miiphy_duplex(const char *devname, unsigned char addr)
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{
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u16 bmcr, anlpar;
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#if defined(CONFIG_PHY_GIGE)
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u16 btsr;
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/* Check for 1000BASE-X. */
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if (miiphy_is_1000base_x(devname, addr)) {
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/* 1000BASE-X */
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if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
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printf("1000BASE-X PHY AN duplex");
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goto miiphy_read_failed;
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}
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}
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/*
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* No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
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*/
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/* Check for 1000BASE-T. */
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if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
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printf("PHY 1000BT status");
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goto miiphy_read_failed;
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}
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if (btsr != 0xFFFF) {
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if (btsr & PHY_1000BTSR_1000FD) {
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return FULL;
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} else if (btsr & PHY_1000BTSR_1000HD) {
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return HALF;
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}
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}
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#endif /* CONFIG_PHY_GIGE */
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/* Check Basic Management Control Register first. */
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if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
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puts("PHY duplex");
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goto miiphy_read_failed;
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}
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/* Check if auto-negotiation is on. */
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if (bmcr & BMCR_ANENABLE) {
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/* Get auto-negotiation results. */
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if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
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puts("PHY AN duplex");
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goto miiphy_read_failed;
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}
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return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
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FULL : HALF;
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}
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/* Get speed from basic control settings. */
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return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
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miiphy_read_failed:
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printf(" read failed, assuming half duplex\n");
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return HALF;
|
|
}
|
|
|
|
/*****************************************************************************
|
|
*
|
|
* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
|
|
* 1000BASE-T, or on error.
|
|
*/
|
|
int miiphy_is_1000base_x(const char *devname, unsigned char addr)
|
|
{
|
|
#if defined(CONFIG_PHY_GIGE)
|
|
u16 exsr;
|
|
|
|
if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
|
|
printf("PHY extended status read failed, assuming no "
|
|
"1000BASE-X\n");
|
|
return 0;
|
|
}
|
|
return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
|
/*****************************************************************************
|
|
*
|
|
* Determine link status
|
|
*/
|
|
int miiphy_link(const char *devname, unsigned char addr)
|
|
{
|
|
unsigned short reg;
|
|
|
|
/* dummy read; needed to latch some phys */
|
|
(void)miiphy_read(devname, addr, MII_BMSR, ®);
|
|
if (miiphy_read(devname, addr, MII_BMSR, ®)) {
|
|
puts("MII_BMSR read failed, assuming no link\n");
|
|
return 0;
|
|
}
|
|
|
|
/* Determine if a link is active */
|
|
if ((reg & BMSR_LSTATUS) != 0) {
|
|
return 1;
|
|
} else {
|
|
return 0;
|
|
}
|
|
}
|
|
#endif
|
|
|