upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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65 lines
1.2 KiB
65 lines
1.2 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*/
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#include <common.h>
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#include <cros_ec.h>
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#include <dm.h>
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#include <os.h>
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#include <asm/test.h>
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#include <asm/u-boot-sandbox.h>
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/*
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* Pointer to initial global data area
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*
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* Here we initialize it.
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*/
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gd_t *gd;
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/* Add a simple GPIO device */
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U_BOOT_DEVICE(gpio_sandbox) = {
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.name = "gpio_sandbox",
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};
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void flush_cache(unsigned long start, unsigned long size)
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{
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}
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#ifndef CONFIG_TIMER
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/* system timer offset in ms */
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static unsigned long sandbox_timer_offset;
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void sandbox_timer_add_offset(unsigned long offset)
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{
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sandbox_timer_offset += offset;
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}
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unsigned long timer_read_counter(void)
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{
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return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
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}
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#endif
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int dram_init(void)
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{
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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if (cros_ec_get_error()) {
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/* Force console on */
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gd->flags &= ~GD_FLG_SILENT;
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printf("cros-ec communications failure %d\n",
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cros_ec_get_error());
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puts("\nPlease reset with Power+Refresh\n\n");
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panic("Cannot init cros-ec device");
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return -1;
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}
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return 0;
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}
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#endif
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