upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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236 lines
6.0 KiB
236 lines
6.0 KiB
#include <common.h>
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#include <mpc8xx.h>
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#include <pcmcia.h>
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#undef CONFIG_PCMCIA
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#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) || defined(CONFIG_CMD_PCMCIA)
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#define CONFIG_PCMCIA
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#endif
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#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || defined(CONFIG_CMD_IDE)) && defined(CONFIG_IDE_8xx_PCCARD)
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#define CONFIG_PCMCIA
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#endif
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#ifdef CONFIG_PCMCIA
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#define PCMCIA_BOARD_MSG "R360MPI"
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int pcmcia_hardware_enable(int slot)
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{
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volatile immap_t *immap;
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volatile cpm8xx_t *cp;
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volatile pcmconf8xx_t *pcmp;
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volatile sysconf8xx_t *sysp;
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uint reg, mask;
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debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
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udelay(10000);
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immap = (immap_t *)CFG_IMMR;
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sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
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pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
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cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
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/*
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* Configure SIUMCR to enable PCMCIA port B
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* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
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*/
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sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
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/* clear interrupt state, and disable interrupts */
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pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
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pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
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/*
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* Disable interrupts, DMA, and PCMCIA buffers
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* (isolate the interface) and assert RESET signal
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*/
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debug ("Disable PCMCIA buffers and assert RESET\n");
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reg = 0;
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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udelay(500);
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/*
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* Configure Ports A, B & C pins for
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* 5 Volts Enable and 3 Volts enable
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*/
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immap->im_ioport.iop_pcpar &= ~(0x0400);
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immap->im_ioport.iop_pcso &= ~(0x0400);/*
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immap->im_ioport.iop_pcdir |= 0x0400;*/
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immap->im_ioport.iop_papar &= ~(0x0200);/*
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immap->im_ioport.iop_padir |= 0x0200;*/
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#if 0
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immap->im_ioport.iop_pbpar &= ~(0xC000);
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immap->im_ioport.iop_pbdir &= ~(0xC000);
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#endif
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/* remove all power */
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immap->im_ioport.iop_pcdat |= 0x0400;
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immap->im_ioport.iop_padat |= 0x0200;
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/*
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* Make sure there is a card in the slot, then configure the interface.
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*/
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udelay(10000);
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debug ("[%d] %s: PIPR(%p)=0x%x\n",
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__LINE__,__FUNCTION__,
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&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
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if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
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printf (" No Card found\n");
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return (1);
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}
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/*
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* Power On.
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*/
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mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
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reg = pcmp->pcmc_pipr;
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debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
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reg,
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(reg&PCMCIA_VS1(slot))?"n":"ff",
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(reg&PCMCIA_VS2(slot))?"n":"ff");
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if ((reg & mask) == mask) {
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immap->im_ioport.iop_pcdat &= ~(0x4000);
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puts (" 5.0V card found: ");
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} else {
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immap->im_ioport.iop_padat &= ~(0x0002);
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puts (" 3.3V card found: ");
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}
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immap->im_ioport.iop_pcdir |= 0x0400;
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immap->im_ioport.iop_padir |= 0x0200;
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#if 0
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/* VCC switch error flag, PCMCIA slot INPACK_ pin */
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cp->cp_pbdir &= ~(0x0020 | 0x0010);
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cp->cp_pbpar &= ~(0x0020 | 0x0010);
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udelay(500000);
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#endif
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debug ("Enable PCMCIA buffers and stop RESET\n");
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reg = PCMCIA_PGCRX(_slot_);
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reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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udelay(250000); /* some cards need >150 ms to come up :-( */
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debug ("# hardware_enable done\n");
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return (0);
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}
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#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) || defined(CONFIG_CMD_PCMCIA)
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int pcmcia_hardware_disable(int slot)
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{
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volatile immap_t *immap;
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volatile pcmconf8xx_t *pcmp;
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u_long reg;
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debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
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immap = (immap_t *)CFG_IMMR;
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pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
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/* remove all power */
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immap->im_ioport.iop_pcdat |= 0x0400;
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immap->im_ioport.iop_padat |= 0x0200;
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/* Configure PCMCIA General Control Register */
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debug ("Disable PCMCIA buffers and assert RESET\n");
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reg = 0;
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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udelay(10000);
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return (0);
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}
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#endif /* CFG_CMD_PCMCIA */
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int pcmcia_voltage_set(int slot, int vcc, int vpp)
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{
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volatile immap_t *immap;
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volatile pcmconf8xx_t *pcmp;
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u_long reg;
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debug ("voltage_set: "
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PCMCIA_BOARD_MSG
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" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
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'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
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immap = (immap_t *)CFG_IMMR;
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pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
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/*
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* Disable PCMCIA buffers (isolate the interface)
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* and assert RESET signal
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*/
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debug ("Disable PCMCIA buffers and assert RESET\n");
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reg = PCMCIA_PGCRX(_slot_);
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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udelay(500);
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/*
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* Configure Ports A & C pins for
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* 5 Volts Enable and 3 Volts enable,
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* Turn off all power
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*/
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debug ("PCMCIA power OFF\n");
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immap->im_ioport.iop_pcpar &= ~(0x0400);
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immap->im_ioport.iop_pcso &= ~(0x0400);/*
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immap->im_ioport.iop_pcdir |= 0x0400;*/
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immap->im_ioport.iop_papar &= ~(0x0200);/*
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immap->im_ioport.iop_padir |= 0x0200;*/
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immap->im_ioport.iop_pcdat |= 0x0400;
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immap->im_ioport.iop_padat |= 0x0200;
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reg = 0;
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switch(vcc) {
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case 0: break;
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case 33: reg |= 0x0200; break;
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case 50: reg |= 0x0400; break;
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default: goto done;
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}
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/* Checking supported voltages */
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debug ("PIPR: 0x%x --> %s\n",
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pcmp->pcmc_pipr,
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(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
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if (reg & 0x0200)
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immap->im_ioport.iop_pcdat &= !reg;
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if (reg & 0x0400)
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immap->im_ioport.iop_padat &= !reg;
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immap->im_ioport.iop_pcdir |= 0x0200;
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immap->im_ioport.iop_padir |= 0x0400;
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if (reg) {
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debug ("PCMCIA powered at %sV\n",
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(reg&0x0400) ? "5.0" : "3.3");
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} else {
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debug ("PCMCIA powered down\n");
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}
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done:
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debug ("Enable PCMCIA buffers and stop RESET\n");
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reg = PCMCIA_PGCRX(_slot_);
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reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
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reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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udelay(500);
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debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
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slot+'A');
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return (0);
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}
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#endif /* CCONFIG_PCMCIA */
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