upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

Dave Liu b4983e16d1 fsl-ddr: use the 1T timing as default configuration ... For light loaded system, we use the 1T timing to gain better memory performance, but for some heavily loaded system, you have to add the 2T timing options to board files. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>		16 years ago
..
Makefile	FSL DDR: Convert MPC8560ADS to new DDR code.	16 years ago
config.mk	Move the MPC8560 ADS board under board/freescale.	17 years ago
ddr.c	fsl-ddr: use the 1T timing as default configuration	16 years ago
law.c	85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards	16 years ago
mpc8560ads.c	mpc8xxx: LCRR[CLKDIV] is sometimes five bits	16 years ago
tlb.c	85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards	16 years ago
u-boot.lds	mpc85xx: workaround old binutils bug	16 years ago