upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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94 lines
2.1 KiB
94 lines
2.1 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include "vct.h"
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/*
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* EBI initialization for SMC911x access
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*/
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int ebi_init_smc911x(void)
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{
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reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020);
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reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
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reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100);
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reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111);
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reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000);
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reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
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reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100);
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reg_write(EBI_DEV1_TIM1_WR2(EBI_BASE), 0x3FC21110);
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return 0;
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}
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/*
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* Accessor functions replacing the "weak" functions in
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* drivers/net/smc911x.c
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*/
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u32 smc911x_reg_read(struct eth_device *dev, u32 addr)
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{
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volatile u32 data;
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addr += dev->iobase;
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reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
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ebi_wait();
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reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
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ebi_wait();
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data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
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return (data);
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}
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void smc911x_reg_write(struct eth_device *dev, u32 addr, u32 data)
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{
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addr += dev->iobase;
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reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
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ebi_wait();
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reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
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reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
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EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
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ebi_wait();
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}
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void pkt_data_push(struct eth_device *dev, u32 addr, u32 data)
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{
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addr += dev->iobase;
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reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
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ebi_wait();
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reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
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reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
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EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
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ebi_wait();
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return;
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}
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u32 pkt_data_pull(struct eth_device *dev, u32 addr)
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{
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volatile u32 data;
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addr += dev->iobase;
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reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
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ebi_wait();
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reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
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ebi_wait();
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data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
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return data;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC911X
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rc = smc911x_initialize(0, CONFIG_DRIVER_SMC911X_BASE);
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#endif
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return rc;
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}
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