upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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147 lines
3.2 KiB
147 lines
3.2 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <mmc.h>
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#include <asm/test.h>
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struct sandbox_mmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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/**
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* sandbox_mmc_send_cmd() - Emulate SD commands
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*
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* This emulate an SD card version 2. Single-block reads result in zero data.
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* Multiple-block reads return a test string.
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*/
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static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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switch (cmd->cmdidx) {
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case MMC_CMD_ALL_SEND_CID:
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break;
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case SD_CMD_SEND_RELATIVE_ADDR:
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cmd->response[0] = 0 << 16; /* mmc->rca */
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case MMC_CMD_GO_IDLE_STATE:
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break;
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case SD_CMD_SEND_IF_COND:
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cmd->response[0] = 0xaa;
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break;
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case MMC_CMD_SEND_STATUS:
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cmd->response[0] = MMC_STATUS_RDY_FOR_DATA;
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break;
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case MMC_CMD_SELECT_CARD:
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break;
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case MMC_CMD_SEND_CSD:
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cmd->response[0] = 0;
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cmd->response[1] = 10 << 16; /* 1 << block_len */
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break;
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case SD_CMD_SWITCH_FUNC: {
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if (!data)
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break;
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u32 *resp = (u32 *)data->dest;
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resp[7] = cpu_to_be32(SD_HIGHSPEED_BUSY);
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if ((cmd->cmdarg & 0xF) == UHS_SDR12_BUS_SPEED)
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resp[4] = (cmd->cmdarg & 0xF) << 24;
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break;
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}
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case MMC_CMD_READ_SINGLE_BLOCK:
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memset(data->dest, '\0', data->blocksize);
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break;
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case MMC_CMD_READ_MULTIPLE_BLOCK:
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strcpy(data->dest, "this is a test");
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break;
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case MMC_CMD_STOP_TRANSMISSION:
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break;
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case SD_CMD_APP_SEND_OP_COND:
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cmd->response[0] = OCR_BUSY | OCR_HCS;
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cmd->response[1] = 0;
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cmd->response[2] = 0;
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break;
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case MMC_CMD_APP_CMD:
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break;
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case MMC_CMD_SET_BLOCKLEN:
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debug("block len %d\n", cmd->cmdarg);
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break;
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case SD_CMD_APP_SEND_SCR: {
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u32 *scr = (u32 *)data->dest;
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scr[0] = cpu_to_be32(2 << 24 | 1 << 15); /* SD version 3 */
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break;
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}
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default:
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debug("%s: Unknown command %d\n", __func__, cmd->cmdidx);
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break;
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}
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return 0;
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}
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static int sandbox_mmc_set_ios(struct udevice *dev)
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{
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return 0;
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}
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static int sandbox_mmc_get_cd(struct udevice *dev)
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{
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return 1;
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}
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static const struct dm_mmc_ops sandbox_mmc_ops = {
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.send_cmd = sandbox_mmc_send_cmd,
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.set_ios = sandbox_mmc_set_ios,
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.get_cd = sandbox_mmc_get_cd,
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};
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int sandbox_mmc_probe(struct udevice *dev)
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{
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struct sandbox_mmc_plat *plat = dev_get_platdata(dev);
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return mmc_init(&plat->mmc);
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}
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int sandbox_mmc_bind(struct udevice *dev)
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{
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struct sandbox_mmc_plat *plat = dev_get_platdata(dev);
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struct mmc_config *cfg = &plat->cfg;
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cfg->name = dev->name;
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cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT;
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cfg->voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
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cfg->f_min = 1000000;
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cfg->f_max = 52000000;
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cfg->b_max = U32_MAX;
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return mmc_bind(dev, &plat->mmc, cfg);
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}
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int sandbox_mmc_unbind(struct udevice *dev)
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{
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mmc_unbind(dev);
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return 0;
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}
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static const struct udevice_id sandbox_mmc_ids[] = {
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{ .compatible = "sandbox,mmc" },
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{ }
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};
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U_BOOT_DRIVER(mmc_sandbox) = {
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.name = "mmc_sandbox",
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.id = UCLASS_MMC,
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.of_match = sandbox_mmc_ids,
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.ops = &sandbox_mmc_ops,
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.bind = sandbox_mmc_bind,
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.unbind = sandbox_mmc_unbind,
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.probe = sandbox_mmc_probe,
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.platdata_auto_alloc_size = sizeof(struct sandbox_mmc_plat),
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};
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