upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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86 lines
3.9 KiB
86 lines
3.9 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Freescale Semiconductor
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*/
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#ifndef _FSL_QBMAN_BASE_H
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#define _FSL_QBMAN_BASE_H
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/* Descriptor for a QBMan instance on the SoC. On partitions/targets that do not
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* control this QBMan instance, these values may simply be place-holders. The
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* idea is simply that we be able to distinguish between them, eg. so that SWP
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* descriptors can identify which QBMan instance they belong to. */
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struct qbman_block_desc {
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void *ccsr_reg_bar; /* CCSR register map */
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int irq_rerr; /* Recoverable error interrupt line */
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int irq_nrerr; /* Non-recoverable error interrupt line */
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};
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/* Descriptor for a QBMan software portal, expressed in terms that make sense to
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* the user context. Ie. on MC, this information is likely to be true-physical,
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* and instantiated statically at compile-time. On GPP, this information is
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* likely to be obtained via "discovery" over a partition's "layerscape bus"
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* (ie. in response to a MC portal command), and would take into account any
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* virtualisation of the GPP user's address space and/or interrupt numbering. */
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struct qbman_swp_desc {
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const struct qbman_block_desc *block; /* The QBMan instance */
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void *cena_bar; /* Cache-enabled portal register map */
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void *cinh_bar; /* Cache-inhibited portal register map */
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};
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/* Driver object for managing a QBMan portal */
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struct qbman_swp;
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/* Place-holder for FDs, we represent it via the simplest form that we need for
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* now. Different overlays may be needed to support different options, etc. (It
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* is impractical to define One True Struct, because the resulting encoding
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* routines (lots of read-modify-writes) would be worst-case performance whether
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* or not circumstances required them.)
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*
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* Note, as with all data-structures exchanged between software and hardware (be
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* they located in the portal register map or DMA'd to and from main-memory),
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* the driver ensures that the caller of the driver API sees the data-structures
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* in host-endianness. "struct qbman_fd" is no exception. The 32-bit words
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* contained within this structure are represented in host-endianness, even if
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* hardware always treats them as little-endian. As such, if any of these fields
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* are interpreted in a binary (rather than numerical) fashion by hardware
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* blocks (eg. accelerators), then the user should be careful. We illustrate
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* with an example;
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*
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* Suppose the desired behaviour of an accelerator is controlled by the "frc"
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* field of the FDs that are sent to it. Suppose also that the behaviour desired
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* by the user corresponds to an "frc" value which is expressed as the literal
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* sequence of bytes 0xfe, 0xed, 0xab, and 0xba. So "frc" should be the 32-bit
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* value in which 0xfe is the first byte and 0xba is the last byte, and as
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* hardware is little-endian, this amounts to a 32-bit "value" of 0xbaabedfe. If
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* the software is little-endian also, this can simply be achieved by setting
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* frc=0xbaabedfe. On the other hand, if software is big-endian, it should set
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* frc=0xfeedabba! The best away of avoiding trouble with this sort of thing is
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* to treat the 32-bit words as numerical values, in which the offset of a field
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* from the beginning of the first byte (as required or generated by hardware)
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* is numerically encoded by a left-shift (ie. by raising the field to a
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* corresponding power of 2). Ie. in the current example, software could set
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* "frc" in the following way, and it would work correctly on both little-endian
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* and big-endian operation;
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* fd.frc = (0xfe << 0) | (0xed << 8) | (0xab << 16) | (0xba << 24);
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*/
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struct qbman_fd {
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union {
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uint32_t words[8];
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struct qbman_fd_simple {
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uint32_t addr_lo;
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uint32_t addr_hi;
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uint32_t len;
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/* offset in the MS 16 bits, BPID in the LS 16 bits */
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uint32_t bpid_offset;
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uint32_t frc; /* frame context */
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/* "err", "va", "cbmt", "asal", [...] */
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uint32_t ctrl;
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/* flow context */
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uint32_t flc_lo;
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uint32_t flc_hi;
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} simple;
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};
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};
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#endif /* !_FSL_QBMAN_BASE_H */
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