upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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496 lines
13 KiB
496 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*/
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/*
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* @file
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* @brief PFE utility commands
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*/
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#include <net/pfe_eth/pfe_eth.h>
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static inline void pfe_command_help(void)
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{
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printf("Usage: pfe [pe | status | expt ] <options>\n");
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}
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static void pfe_command_pe(int argc, char * const argv[])
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{
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if (argc >= 3 && strcmp(argv[2], "pmem") == 0) {
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if (argc >= 4 && strcmp(argv[3], "read") == 0) {
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int i;
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int num;
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int id;
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u32 addr;
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u32 size;
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u32 val;
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if (argc == 7) {
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num = simple_strtoul(argv[6], NULL, 0);
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} else if (argc == 6) {
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num = 1;
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} else {
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printf("Usage: pfe pe pmem read <id> <addr> [<num>]\n");
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return;
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}
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id = simple_strtoul(argv[4], NULL, 0);
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addr = simple_strtoul(argv[5], NULL, 16);
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size = 4;
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for (i = 0; i < num; i++, addr += 4) {
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val = pe_pmem_read(id, addr, size);
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val = be32_to_cpu(val);
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if (!(i & 3))
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printf("%08x: ", addr);
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printf("%08x%s", val, i == num - 1 || (i & 3)
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== 3 ? "\n" : " ");
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}
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} else {
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printf("Usage: pfe pe pmem read <parameters>\n");
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}
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} else if (argc >= 3 && strcmp(argv[2], "dmem") == 0) {
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if (argc >= 4 && strcmp(argv[3], "read") == 0) {
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int i;
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int num;
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int id;
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u32 addr;
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u32 size;
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u32 val;
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if (argc == 7) {
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num = simple_strtoul(argv[6], NULL, 0);
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} else if (argc == 6) {
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num = 1;
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} else {
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printf("Usage: pfe pe dmem read <id> <addr> [<num>]\n");
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return;
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}
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id = simple_strtoul(argv[4], NULL, 0);
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addr = simple_strtoul(argv[5], NULL, 16);
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size = 4;
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for (i = 0; i < num; i++, addr += 4) {
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val = pe_dmem_read(id, addr, size);
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val = be32_to_cpu(val);
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if (!(i & 3))
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printf("%08x: ", addr);
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printf("%08x%s", val, i == num - 1 || (i & 3)
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== 3 ? "\n" : " ");
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}
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} else if (argc >= 4 && strcmp(argv[3], "write") == 0) {
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int id;
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u32 val;
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u32 addr;
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u32 size;
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if (argc != 7) {
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printf("Usage: pfe pe dmem write <id> <val> <addr>\n");
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return;
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}
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id = simple_strtoul(argv[4], NULL, 0);
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val = simple_strtoul(argv[5], NULL, 16);
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val = cpu_to_be32(val);
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addr = simple_strtoul(argv[6], NULL, 16);
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size = 4;
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pe_dmem_write(id, val, addr, size);
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} else {
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printf("Usage: pfe pe dmem [read | write] <parameters>\n");
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}
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} else if (argc >= 3 && strcmp(argv[2], "lmem") == 0) {
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if (argc >= 4 && strcmp(argv[3], "read") == 0) {
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int i;
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int num;
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u32 val;
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u32 offset;
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if (argc == 6) {
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num = simple_strtoul(argv[5], NULL, 0);
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} else if (argc == 5) {
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num = 1;
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} else {
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printf("Usage: pfe pe lmem read <offset> [<num>]\n");
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return;
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}
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offset = simple_strtoul(argv[4], NULL, 16);
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for (i = 0; i < num; i++, offset += 4) {
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pe_lmem_read(&val, 4, offset);
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val = be32_to_cpu(val);
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printf("%08x%s", val, i == num - 1 || (i & 7)
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== 7 ? "\n" : " ");
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}
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} else if (argc >= 4 && strcmp(argv[3], "write") == 0) {
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u32 val;
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u32 offset;
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if (argc != 6) {
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printf("Usage: pfe pe lmem write <val> <offset>\n");
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return;
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}
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val = simple_strtoul(argv[4], NULL, 16);
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val = cpu_to_be32(val);
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offset = simple_strtoul(argv[5], NULL, 16);
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pe_lmem_write(&val, 4, offset);
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} else {
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printf("Usage: pfe pe lmem [read | write] <parameters>\n");
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}
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} else {
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if (strcmp(argv[2], "help") != 0)
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printf("Unknown option: %s\n", argv[2]);
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printf("Usage: pfe pe <parameters>\n");
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}
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}
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#define NUM_QUEUES 16
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/*
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* qm_read_drop_stat
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* This function is used to read the drop statistics from the TMU
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* hw drop counter. Since the hw counter is always cleared afer
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* reading, this function maintains the previous drop count, and
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* adds the new value to it. That value can be retrieved by
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* passing a pointer to it with the total_drops arg.
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*
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* @param tmu TMU number (0 - 3)
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* @param queue queue number (0 - 15)
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* @param total_drops pointer to location to store total drops (or NULL)
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* @param do_reset if TRUE, clear total drops after updating
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*
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*/
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u32 qm_read_drop_stat(u32 tmu, u32 queue, u32 *total_drops, int do_reset)
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{
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static u32 qtotal[TMU_MAX_ID + 1][NUM_QUEUES];
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u32 val;
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writel((tmu << 8) | queue, TMU_TEQ_CTRL);
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writel((tmu << 8) | queue, TMU_LLM_CTRL);
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val = readl(TMU_TEQ_DROP_STAT);
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qtotal[tmu][queue] += val;
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if (total_drops)
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*total_drops = qtotal[tmu][queue];
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if (do_reset)
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qtotal[tmu][queue] = 0;
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return val;
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}
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static ssize_t tmu_queue_stats(char *buf, int tmu, int queue)
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{
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ssize_t len = 0;
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u32 drops;
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printf("%d-%02d, ", tmu, queue);
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drops = qm_read_drop_stat(tmu, queue, NULL, 0);
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/* Select queue */
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writel((tmu << 8) | queue, TMU_TEQ_CTRL);
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writel((tmu << 8) | queue, TMU_LLM_CTRL);
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printf("(teq) drop: %10u, tx: %10u (llm) head: %08x, tail: %08x, drop: %10u\n",
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drops, readl(TMU_TEQ_TRANS_STAT),
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readl(TMU_LLM_QUE_HEADPTR), readl(TMU_LLM_QUE_TAILPTR),
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readl(TMU_LLM_QUE_DROPCNT));
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return len;
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}
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static ssize_t tmu_queues(char *buf, int tmu)
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{
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ssize_t len = 0;
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int queue;
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for (queue = 0; queue < 16; queue++)
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len += tmu_queue_stats(buf + len, tmu, queue);
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return len;
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}
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static inline void hif_status(void)
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{
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printf("hif:\n");
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printf(" tx curr bd: %x\n", readl(HIF_TX_CURR_BD_ADDR));
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printf(" tx status: %x\n", readl(HIF_TX_STATUS));
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printf(" tx dma status: %x\n", readl(HIF_TX_DMA_STATUS));
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printf(" rx curr bd: %x\n", readl(HIF_RX_CURR_BD_ADDR));
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printf(" rx status: %x\n", readl(HIF_RX_STATUS));
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printf(" rx dma status: %x\n", readl(HIF_RX_DMA_STATUS));
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printf("hif nocopy:\n");
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printf(" tx curr bd: %x\n", readl(HIF_NOCPY_TX_CURR_BD_ADDR));
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printf(" tx status: %x\n", readl(HIF_NOCPY_TX_STATUS));
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printf(" tx dma status: %x\n", readl(HIF_NOCPY_TX_DMA_STATUS));
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printf(" rx curr bd: %x\n", readl(HIF_NOCPY_RX_CURR_BD_ADDR));
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printf(" rx status: %x\n", readl(HIF_NOCPY_RX_STATUS));
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printf(" rx dma status: %x\n", readl(HIF_NOCPY_RX_DMA_STATUS));
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}
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static void gpi(int id, void *base)
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{
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u32 val;
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printf("%s%d:\n", __func__, id);
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printf(" tx under stick: %x\n", readl(base + GPI_FIFO_STATUS));
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val = readl(base + GPI_FIFO_DEBUG);
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printf(" tx pkts: %x\n", (val >> 23) & 0x3f);
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printf(" rx pkts: %x\n", (val >> 18) & 0x3f);
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printf(" tx bytes: %x\n", (val >> 9) & 0x1ff);
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printf(" rx bytes: %x\n", (val >> 0) & 0x1ff);
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printf(" overrun: %x\n", readl(base + GPI_OVERRUN_DROPCNT));
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}
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static void bmu(int id, void *base)
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{
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printf("%s%d:\n", __func__, id);
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printf(" buf size: %x\n", (1 << readl(base + BMU_BUF_SIZE)));
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printf(" buf count: %x\n", readl(base + BMU_BUF_CNT));
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printf(" buf rem: %x\n", readl(base + BMU_REM_BUF_CNT));
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printf(" buf curr: %x\n", readl(base + BMU_CURR_BUF_CNT));
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printf(" free err: %x\n", readl(base + BMU_FREE_ERR_ADDR));
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}
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#define PESTATUS_ADDR_CLASS 0x800
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#define PEMBOX_ADDR_CLASS 0x890
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#define PESTATUS_ADDR_TMU 0x80
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#define PEMBOX_ADDR_TMU 0x290
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#define PESTATUS_ADDR_UTIL 0x0
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static void pfe_pe_status(int argc, char * const argv[])
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{
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int do_clear = 0;
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u32 id;
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u32 dmem_addr;
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u32 cpu_state;
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u32 activity_counter;
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u32 rx;
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u32 tx;
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u32 drop;
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char statebuf[5];
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u32 class_debug_reg = 0;
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if (argc == 4 && strcmp(argv[3], "clear") == 0)
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do_clear = 1;
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for (id = CLASS0_ID; id < MAX_PE; id++) {
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if (id >= TMU0_ID) {
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if (id == TMU2_ID)
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continue;
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if (id == TMU0_ID)
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printf("tmu:\n");
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dmem_addr = PESTATUS_ADDR_TMU;
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} else {
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if (id == CLASS0_ID)
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printf("class:\n");
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dmem_addr = PESTATUS_ADDR_CLASS;
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class_debug_reg = readl(CLASS_PE0_DEBUG + id * 4);
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}
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cpu_state = pe_dmem_read(id, dmem_addr, 4);
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dmem_addr += 4;
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memcpy(statebuf, (char *)&cpu_state, 4);
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statebuf[4] = '\0';
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activity_counter = pe_dmem_read(id, dmem_addr, 4);
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dmem_addr += 4;
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rx = pe_dmem_read(id, dmem_addr, 4);
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if (do_clear)
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pe_dmem_write(id, 0, dmem_addr, 4);
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dmem_addr += 4;
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tx = pe_dmem_read(id, dmem_addr, 4);
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if (do_clear)
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pe_dmem_write(id, 0, dmem_addr, 4);
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dmem_addr += 4;
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drop = pe_dmem_read(id, dmem_addr, 4);
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if (do_clear)
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pe_dmem_write(id, 0, dmem_addr, 4);
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dmem_addr += 4;
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if (id >= TMU0_ID) {
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printf("%d: state=%4s ctr=%08x rx=%x qstatus=%x\n",
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id - TMU0_ID, statebuf,
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cpu_to_be32(activity_counter),
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cpu_to_be32(rx), cpu_to_be32(tx));
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} else {
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printf("%d: pc=1%04x ldst=%04x state=%4s ctr=%08x rx=%x tx=%x drop=%x\n",
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id - CLASS0_ID, class_debug_reg & 0xFFFF,
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class_debug_reg >> 16,
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statebuf, cpu_to_be32(activity_counter),
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cpu_to_be32(rx), cpu_to_be32(tx),
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cpu_to_be32(drop));
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}
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}
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}
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static void pfe_command_status(int argc, char * const argv[])
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{
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if (argc >= 3 && strcmp(argv[2], "pe") == 0) {
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pfe_pe_status(argc, argv);
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} else if (argc == 3 && strcmp(argv[2], "bmu") == 0) {
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bmu(1, BMU1_BASE_ADDR);
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bmu(2, BMU2_BASE_ADDR);
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} else if (argc == 3 && strcmp(argv[2], "hif") == 0) {
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hif_status();
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} else if (argc == 3 && strcmp(argv[2], "gpi") == 0) {
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gpi(0, EGPI1_BASE_ADDR);
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gpi(1, EGPI2_BASE_ADDR);
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gpi(3, HGPI_BASE_ADDR);
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} else if (argc == 3 && strcmp(argv[2], "tmu0_queues") == 0) {
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tmu_queues(NULL, 0);
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} else if (argc == 3 && strcmp(argv[2], "tmu1_queues") == 0) {
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tmu_queues(NULL, 1);
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} else if (argc == 3 && strcmp(argv[2], "tmu3_queues") == 0) {
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tmu_queues(NULL, 3);
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} else {
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printf("Usage: pfe status [pe <clear> | bmu | gpi | hif | tmuX_queues ]\n");
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}
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}
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#define EXPT_DUMP_ADDR 0x1fa8
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#define EXPT_REG_COUNT 20
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static const char *register_names[EXPT_REG_COUNT] = {
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" pc", "ECAS", " EID", " ED",
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" sp", " r1", " r2", " r3",
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" r4", " r5", " r6", " r7",
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" r8", " r9", " r10", " r11",
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" r12", " r13", " r14", " r15"
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};
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static void pfe_command_expt(int argc, char * const argv[])
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{
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unsigned int id, i, val, addr;
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if (argc == 3) {
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id = simple_strtoul(argv[2], NULL, 0);
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addr = EXPT_DUMP_ADDR;
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printf("Exception information for PE %d:\n", id);
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for (i = 0; i < EXPT_REG_COUNT; i++) {
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val = pe_dmem_read(id, addr, 4);
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val = be32_to_cpu(val);
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printf("%s:%08x%s", register_names[i], val,
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(i & 3) == 3 ? "\n" : " ");
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addr += 4;
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}
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} else {
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printf("Usage: pfe expt <id>\n");
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}
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}
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#ifdef PFE_RESET_WA
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/*This function sends a dummy packet to HIF through TMU3 */
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static void send_dummy_pkt_to_hif(void)
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{
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u32 buf;
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static u32 dummy_pkt[] = {
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0x4200800a, 0x01000003, 0x00018100, 0x00000000,
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0x33221100, 0x2b785544, 0xd73093cb, 0x01000608,
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0x04060008, 0x2b780200, 0xd73093cb, 0x0a01a8c0,
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0x33221100, 0xa8c05544, 0x00000301, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0xbe86c51f };
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/*Allocate BMU2 buffer */
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buf = readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL);
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debug("Sending a dummy pkt to HIF %x\n", buf);
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buf += 0x80;
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memcpy((void *)DDR_PFE_TO_VIRT(buf), dummy_pkt, sizeof(dummy_pkt));
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/*Write length and pkt to TMU*/
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writel(0x03000042, TMU_PHY_INQ_PKTPTR);
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writel(buf, TMU_PHY_INQ_PKTINFO);
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}
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static void pfe_command_stop(int argc, char * const argv[])
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{
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int pfe_pe_id, hif_stop_loop = 10;
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u32 rx_status;
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printf("Stopping PFE...\n");
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/*Mark all descriptors as LAST_BD */
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hif_rx_desc_disable();
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/*If HIF Rx BDP is busy send a dummy packet */
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do {
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rx_status = readl(HIF_RX_STATUS);
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if (rx_status & BDP_CSR_RX_DMA_ACTV)
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send_dummy_pkt_to_hif();
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udelay(10);
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} while (hif_stop_loop--);
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if (readl(HIF_RX_STATUS) & BDP_CSR_RX_DMA_ACTV)
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printf("Unable to stop HIF\n");
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/*Disable Class PEs */
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for (pfe_pe_id = CLASS0_ID; pfe_pe_id <= CLASS_MAX_ID; pfe_pe_id++) {
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/*Inform PE to stop */
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pe_dmem_write(pfe_pe_id, cpu_to_be32(1), PEMBOX_ADDR_CLASS, 4);
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udelay(10);
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/*Read status */
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if (!pe_dmem_read(pfe_pe_id, PEMBOX_ADDR_CLASS + 4, 4))
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printf("Failed to stop PE%d\n", pfe_pe_id);
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}
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/*Disable TMU PEs */
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for (pfe_pe_id = TMU0_ID; pfe_pe_id <= TMU_MAX_ID; pfe_pe_id++) {
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if (pfe_pe_id == TMU2_ID)
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continue;
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/*Inform PE to stop */
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pe_dmem_write(pfe_pe_id, 1, PEMBOX_ADDR_TMU, 4);
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udelay(10);
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/*Read status */
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if (!pe_dmem_read(pfe_pe_id, PEMBOX_ADDR_TMU + 4, 4))
|
|
printf("Failed to stop PE%d\n", pfe_pe_id);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
static int pfe_command(cmd_tbl_t *cmdtp, int flag, int argc,
|
|
char * const argv[])
|
|
{
|
|
if (argc == 1 || strcmp(argv[1], "help") == 0) {
|
|
pfe_command_help();
|
|
return CMD_RET_SUCCESS;
|
|
}
|
|
|
|
if (strcmp(argv[1], "pe") == 0) {
|
|
pfe_command_pe(argc, argv);
|
|
} else if (strcmp(argv[1], "status") == 0) {
|
|
pfe_command_status(argc, argv);
|
|
} else if (strcmp(argv[1], "expt") == 0) {
|
|
pfe_command_expt(argc, argv);
|
|
#ifdef PFE_RESET_WA
|
|
} else if (strcmp(argv[1], "stop") == 0) {
|
|
pfe_command_stop(argc, argv);
|
|
#endif
|
|
} else {
|
|
printf("Unknown option: %s\n", argv[1]);
|
|
pfe_command_help();
|
|
return CMD_RET_FAILURE;
|
|
}
|
|
return CMD_RET_SUCCESS;
|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
pfe, 7, 1, pfe_command,
|
|
"Performs PFE lib utility functions",
|
|
"Usage:\n"
|
|
"pfe <options>"
|
|
);
|
|
|