upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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43 lines
919 B
43 lines
919 B
/* SPDX-License-Identifier: Intel */
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/*
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* Copyright (C) 2013, Intel Corporation
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* Ported from Intel released Quark UEFI BIOS
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* QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei
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*/
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#ifndef _HTE_H_
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#define _HTE_H_
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enum {
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MRC_MEM_INIT,
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MRC_MEM_TEST
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};
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enum {
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READ_TRAIN,
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WRITE_TRAIN
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};
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/*
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* EXP_LOOP_CNT field of HTE_CMD_CTL
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*
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* This CANNOT be less than 4!
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*/
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#define HTE_LOOP_CNT 5
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/* random seed for victim */
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#define HTE_LFSR_VICTIM_SEED 0xf294ba21
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/* random seed for aggressor */
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#define HTE_LFSR_AGRESSOR_SEED 0xeba7492d
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u32 hte_mem_init(struct mrc_params *mrc_params, u8 flag);
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u16 hte_basic_write_read(struct mrc_params *mrc_params, u32 addr,
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u8 first_run, u8 mode);
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u16 hte_write_stress_bit_lanes(struct mrc_params *mrc_params,
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u32 addr, u8 first_run);
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void hte_mem_op(u32 addr, u8 first_run, u8 is_write);
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#endif /* _HTE_H_ */
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