upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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78 lines
1.4 KiB
78 lines
1.4 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
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* Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
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*/
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#include <common.h>
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#include <linux/usb/otg.h>
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#include <dwc3-sti-glue.h>
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#include <dwc3-uboot.h>
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#include <usb.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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#ifndef CONFIG_SYS_DCACHE_OFF
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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int board_init(void)
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{
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return 0;
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}
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#ifdef CONFIG_USB_DWC3
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static struct dwc3_device dwc3_device_data = {
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.maximum_speed = USB_SPEED_HIGH,
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.dr_mode = USB_DR_MODE_PERIPHERAL,
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.index = 0,
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};
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int usb_gadget_handle_interrupts(int index)
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{
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dwc3_uboot_handle_interrupt(index);
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return 0;
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}
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int board_usb_init(int index, enum usb_init_type init)
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{
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int node;
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const void *blob = gd->fdt_blob;
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/* find the snps,dwc3 node */
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node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
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dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg");
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return dwc3_uboot_init(&dwc3_device_data);
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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dwc3_uboot_exit(index);
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return 0;
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}
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int g_dnl_board_usb_cable_connected(void)
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{
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return 1;
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}
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#endif
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