upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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149 lines
4.0 KiB
149 lines
4.0 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2017 NXP Semiconductors
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*
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* Configuration settings for the i.MX7D Pico board.
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*/
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#ifndef __PICO_IMX7D_CONFIG_H
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#define __PICO_IMX7D_CONFIG_H
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#include "mx7_common.h"
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#include "imx7_spl.h"
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#ifdef CONFIG_SPL_OS_BOOT
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/* Falcon Mode */
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x88000000
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/* Falcon Mode - MMC support: args@1MB kernel@2MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
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#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR
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/* Network */
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 1
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#define CONFIG_PHY_ATHEROS
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/* ENET1 */
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#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
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/* MMC Config */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_DFU_ENV_SETTINGS \
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"dfu_alt_info=" \
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"spl raw 0x2 0x400 mmcpart 1;" \
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"u-boot raw 0x8a 0x400 mmcpart 1;" \
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"/boot/zImage ext4 0 1;" \
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"/boot/imx7d-pico-hobbit.dtb ext4 0 1;" \
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"/boot/imx7d-pico-pi.dtb ext4 0 1;" \
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"rootfs part 0 1\0" \
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#define BOOTMENU_ENV \
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"bootmenu_0=Boot using PICO-Hobbit baseboard=" \
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"setenv fdtfile imx7d-pico-hobbit.dtb\0" \
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"bootmenu_1=Boot using PICO-Pi baseboard=" \
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"setenv fdtfile imx7d-pico-pi.dtb\0" \
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc4\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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BOOTMENU_ENV \
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"fdt_addr=0x83000000\0" \
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"fdt_addr_r=0x83000000\0" \
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"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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"ramdisk_addr_r=0x83000000\0" \
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"ramdiskaddr=0x83000000\0" \
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"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
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CONFIG_DFU_ENV_SETTINGS \
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"findfdt=" \
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"if test $fdtfile = ask ; then " \
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"bootmenu -1; fi;" \
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"if test $fdtfile != ask ; then " \
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"saveenv; fi;\0" \
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"finduuid=part uuid mmc 0:1 uuid\0" \
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"partitions=" \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \
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"fastboot_partition_alias_system=rootfs\0" \
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"setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* I2C configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1
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#define CONFIG_SYS_I2C_MXC_I2C2
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#define CONFIG_SYS_I2C_MXC_I2C3
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#define CONFIG_SYS_I2C_MXC_I2C4
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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/* FLASH and environment organization */
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 0
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_IMX_THERMAL
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#endif
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