upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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194 lines
4.0 KiB
194 lines
4.0 KiB
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "rk3368.dtsi"
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#include "rk3368-lion-u-boot.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Theobroma Systems RK3368-uQ7 SoM";
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compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368";
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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ext_gmac: gmac-clk {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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#clock-cells = <0>;
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};
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vcc_sys: vcc-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&uart0 {
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status = "okay";
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};
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&emmc {
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status = "okay";
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bus-width = <8>;
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cap-mmc-highspeed;
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clock-frequency = <150000000>;
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disable-wp;
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keep-power-in-suspend;
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non-removable;
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num-slots = <1>;
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vmmc-supply = <&vcc33_io>;
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vqmmc-supply = <&vcc18_io>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
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};
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&sdmmc {
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status = "okay";
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};
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&gmac {
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status = "okay";
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phy-supply = <&vcc33_io>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <2 10000 50000>;
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x10>;
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rx_delay = <0x10>;
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};
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&i2c0 {
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status = "okay";
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio0>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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rockchip,system-power-controller;
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc6-supply = <&vcc_sys>;
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vcc7-supply = <&vcc_sys>;
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vcc8-supply = <&vcc_sys>;
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vcc9-supply = <&vcc_sys>;
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vcc10-supply = <&vcc_sys>;
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vcc11-supply = <&vcc_sys>;
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vcc12-supply = <&vcc_sys>;
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clock-output-names = "xin32k", "rk808-clkout2";
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#clock-cells = <1>;
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regulators {
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vdd_cpu: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd_cpu";
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};
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vdd_log: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd_log";
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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};
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vcc33_io: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_io";
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};
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vcc33_video: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_video";
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};
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vdd10_pll: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_pll";
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};
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vcc18_io: LDO_REG4 {
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_io";
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};
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vdd10_video: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_video";
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};
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vcc18_video: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_video";
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};
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spiflash: w25q32dw@0 {
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compatible = "spi-flash";
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reg = <0>;
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spi-max-frequency = <49500000>;
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spi-cpol;
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spi-cpha;
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};
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};
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