upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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39 lines
1.2 KiB
39 lines
1.2 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* LPC32xx GPIO interface macro for pin mapping.
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*
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* (C) Copyright 2015 DENX Software Engineering GmbH
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* Written-by: Sylvain Lemieux <slemieux@@tycoint.com>
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*/
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#ifndef _LPC32XX_GPIO_GRP_H
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#define _LPC32XX_GPIO_GRP_H
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/*
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* Macro to map the pin for the lpc32xx_gpio driver.
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* Note: - GPIOS are considered here as homogeneous and linear from 0 to 159;
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* mapping is done per register, as group of 32.
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* (see drivers/gpio/lpc32xx_gpio.c for details).
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* - macros can be use with the following pins:
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* P0.0 - P0.7
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* P1.0 - P1.23
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* P2.0 - P2.12
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* P3 GPI_0 - GPI_9 / GPI_15 - GPI_23 / GPI_25 / GPI_27 - GPI_28
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* P3 GPO_0 - GPO_23
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* P3 GPIO_0 - GPIO_5 (output register only)
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*/
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#define LPC32XX_GPIO_P0_GRP 0
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#define LPC32XX_GPIO_P1_GRP 32
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#define LPC32XX_GPIO_P2_GRP 64
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#define LPC32XX_GPO_P3_GRP 96
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#define LPC32XX_GPIO_P3_GRP (LPC32XX_GPO_P3_GRP + 25)
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#define LPC32XX_GPI_P3_GRP 128
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/*
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* A specific GPIO can be selected with this macro
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* ie, GPIO P0.1 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P0_GRP, 1)
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* See the LPC32x0 User's guide for GPIO group numbers
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*/
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#define LPC32XX_GPIO(x, y) ((x) + (y))
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#endif /* _LPC32XX_GPIO_GRP_H */
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