upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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134 lines
3.0 KiB
134 lines
3.0 KiB
/*
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* (C) Copyright 2008
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* Grazvydas Ignotas <notasas@gmail.com>
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*
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* Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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* Sunil Kumar <sunilsaini05@gmail.com>
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* Shashi Ranjan <shashiranjanmca05@gmail.com>
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*
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <twl4030.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-types.h>
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#include "pandora.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define TWL4030_BB_CFG_BBCHEN (1 << 4)
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#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
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#define TWL4030_BB_CFG_BBISEL_500UA 2
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#define CONTROL_WKUP_CTRL 0x48002a5c
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#define GPIO_IO_PWRDNZ (1 << 6)
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#define PBIASLITEVMODE1 (1 << 8)
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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return 0;
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}
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static void set_output_gpio(unsigned int gpio, int value)
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{
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int ret;
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ret = gpio_request(gpio, "");
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if (ret != 0) {
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printf("could not request GPIO %u\n", gpio);
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return;
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}
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ret = gpio_direction_output(gpio, value);
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if (ret != 0)
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printf("could not set GPIO %u to %d\n", gpio, value);
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}
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/*
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* Routine: misc_init_r
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* Description: Configure board specific parts
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*/
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int misc_init_r(void)
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{
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t2_t *t2_base = (t2_t *)T2_BASE;
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u32 pbias_lite;
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twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
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/* set up dual-voltage GPIOs to 1.8V */
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pbias_lite = readl(&t2_base->pbias_lite);
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pbias_lite &= ~PBIASLITEVMODE1;
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pbias_lite |= PBIASLITEPWRDNZ1;
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writel(pbias_lite, &t2_base->pbias_lite);
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if (get_cpu_family() == CPU_OMAP36XX)
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writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
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CONTROL_WKUP_CTRL);
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/* make sure audio and BT chips are in powerdown state */
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set_output_gpio(14, 0);
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set_output_gpio(15, 0);
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set_output_gpio(118, 0);
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/* enable USB supply */
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set_output_gpio(164, 1);
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/* wifi needs a short pulse to enter powersave state */
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set_output_gpio(23, 1);
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udelay(5000);
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gpio_direction_output(23, 0);
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/* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_BB_CFG,
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TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
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TWL4030_BB_CFG_BBISEL_500UA);
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omap_die_id_display();
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_PANDORA();
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if (get_cpu_family() == CPU_OMAP36XX) {
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MUX_PANDORA_3730();
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}
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}
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#ifdef CONFIG_MMC
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int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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void board_mmc_power_init(void)
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{
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twl4030_power_mmc_init(0);
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}
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#endif
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