upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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188 lines
4.5 KiB
188 lines
4.5 KiB
/*
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* Copyright (C) 2011 OMICRON electronics GmbH
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*
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* Based on da850evm.c. Original Copyrights follow:
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <i2c.h>
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#include <net.h>
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#include <netdev.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/arch/timer_defs.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define CALIMAIN_HWVERSION_MASK 0x7f000000
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#define CALIMAIN_HWVERSION_SHIFT 24
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/* Hardware version pinmux settings */
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const struct pinmux_config hwversion_pins[] = {
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{ pinmux(16), 8, 2 }, /* GP7[15] */
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{ pinmux(16), 8, 3 }, /* GP7[14] */
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{ pinmux(16), 8, 4 }, /* GP7[13] */
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{ pinmux(16), 8, 5 }, /* GP7[12] */
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{ pinmux(16), 8, 6 }, /* GP7[11] */
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{ pinmux(16), 8, 7 }, /* GP7[10] */
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{ pinmux(17), 8, 0 }, /* GP7[9] */
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{ pinmux(17), 8, 1 } /* GP7[8] */
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};
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const struct pinmux_resource pinmuxes[] = {
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PINMUX_ITEM(uart2_pins_txrx),
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PINMUX_ITEM(emac_pins_mii),
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PINMUX_ITEM(emac_pins_mdio),
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PINMUX_ITEM(emifa_pins_nor),
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PINMUX_ITEM(emifa_pins_cs2),
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PINMUX_ITEM(emifa_pins_cs3),
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};
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const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
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const struct lpsc_resource lpsc[] = {
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{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
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{ DAVINCI_LPSC_EMAC }, /* image download */
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{ DAVINCI_LPSC_UART2 }, /* console */
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{ DAVINCI_LPSC_GPIO },
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};
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const int lpsc_size = ARRAY_SIZE(lpsc);
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/* read board revision from GPIO7[8..14] */
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u32 get_board_rev(void)
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{
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lpsc_on(DAVINCI_LPSC_GPIO);
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if (davinci_configure_pin_mux(hwversion_pins,
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ARRAY_SIZE(hwversion_pins)) != 0)
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return 0xffffffff;
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return (davinci_gpio_bank67->in_data & CALIMAIN_HWVERSION_MASK)
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>> CALIMAIN_HWVERSION_SHIFT;
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}
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/*
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* determine the oscillator frequency depending on the board revision
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*
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* rev 0x00 ... 25 MHz oscillator
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* rev 0x01 ... 24 MHz oscillator
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*/
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int calimain_get_osc_freq(void)
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{
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u32 rev;
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int freq;
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rev = get_board_rev();
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switch (rev) {
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case 0x00:
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freq = 25000000;
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break;
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default:
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freq = 24000000;
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break;
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}
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return freq;
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}
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int board_init(void)
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{
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int val;
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#ifndef CONFIG_USE_IRQ
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irq_init();
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#endif
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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#ifdef CONFIG_DRIVER_TI_EMAC
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/* select emac MII mode */
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val = readl(&davinci_syscfg_regs->cfgchip3);
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val &= ~(1 << 8);
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writel(val, &davinci_syscfg_regs->cfgchip3);
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#endif /* CONFIG_DRIVER_TI_EMAC */
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#ifdef CONFIG_HW_WATCHDOG
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davinci_hw_watchdog_enable();
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#endif
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printf("Input clock frequency: %d Hz\n", calimain_get_osc_freq());
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printf("Board revision: %d\n", get_board_rev());
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return 0;
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}
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#ifdef CONFIG_DRIVER_TI_EMAC
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/*
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* Initializes on-board ethernet controllers.
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*/
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int board_eth_init(bd_t *bis)
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{
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if (!davinci_emac_initialize()) {
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printf("Error: Ethernet init failed!\n");
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return -1;
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}
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return 0;
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}
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#endif /* CONFIG_DRIVER_TI_EMAC */
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#ifdef CONFIG_HW_WATCHDOG
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void hw_watchdog_reset(void)
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{
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davinci_hw_watchdog_reset();
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}
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#endif
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#if defined(CONFIG_BOOTCOUNT_LIMIT)
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void bootcount_store(ulong a)
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{
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struct davinci_rtc *reg =
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(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
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/*
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* write RTC kick register to enable write
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* for RTC Scratch registers. Cratch0 and 1 are
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* used for bootcount values.
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*/
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writel(RTC_KICK0R_WE, ®->kick0r);
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writel(RTC_KICK1R_WE, ®->kick1r);
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writel(a, ®->scratch0);
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writel(BOOTCOUNT_MAGIC, ®->scratch1);
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}
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ulong bootcount_load(void)
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{
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struct davinci_rtc *reg =
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(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
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if (readl(®->scratch1) != BOOTCOUNT_MAGIC)
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return 0;
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else
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return readl(®->scratch0);
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}
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#endif
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