upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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107 lines
1.9 KiB
107 lines
1.9 KiB
/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/fsl_serdes.h>
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#include <asm/arch/soc.h>
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#include <hwconfig.h>
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#include <ahci.h>
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#include <mmc.h>
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#include <scsi.h>
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#include <fsl_esdhc.h>
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#include <environment.h>
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#include <fsl_mmdc.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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u8 in1;
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puts("Board: LS1012ARDB ");
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/* Initialize i2c early for Serial flash bank information */
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i2c_set_bus_num(0);
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if (i2c_read(I2C_MUX_IO1_ADDR, 1, 1, &in1, 1) < 0) {
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printf("Error reading i2c boot information!\n");
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return 0; /* Don't want to hang() on this error */
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}
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puts("Version");
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if ((in1 & (~__SW_REV_MASK)) == __SW_REV_A)
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puts(": RevA");
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else if ((in1 & (~__SW_REV_MASK)) == __SW_REV_B)
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puts(": RevB");
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else
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puts(": unknown");
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printf(", boot from QSPI");
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if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_EMU)
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puts(": emu\n");
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else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK1)
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puts(": bank1\n");
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else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK2)
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puts(": bank2\n");
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else
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puts("unknown\n");
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return 0;
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}
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int dram_init(void)
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{
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mmdc_init();
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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int board_early_init_f(void)
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{
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fsl_lsch2_early_init_f();
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return 0;
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}
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int board_init(void)
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{
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struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
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/*
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* Set CCI-400 control override register to enable barrier
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* transaction
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*/
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out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
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#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
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erratum_a010315();
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#endif
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#ifdef CONFIG_ENV_IS_NOWHERE
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gd->env_addr = (ulong)&default_environment[0];
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#endif
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return 0;
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}
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int ft_board_setup(void *blob, bd_t *bd)
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{
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arch_fixup_fdt(blob);
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ft_cpu_setup(blob, bd);
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return 0;
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}
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