upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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721 lines
15 KiB
721 lines
15 KiB
/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* MPC8xx/MPC8260 Internal Memory Map Functions
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*/
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#include <common.h>
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#include <command.h>
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#if (CONFIG_COMMANDS & CFG_CMD_IMMAP) && \
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(defined(CONFIG_8xx) || defined(CONFIG_8260))
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#if defined(CONFIG_8xx)
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#include <asm/8xx_immap.h>
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#include <commproc.h>
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#include <asm/iopin_8xx.h>
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#elif defined(CONFIG_8260)
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#include <asm/immap_8260.h>
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#include <asm/cpm_8260.h>
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#include <asm/iopin_8260.h>
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#endif
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static void
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unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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printf ("Sorry, but the '%s' command has not been implemented\n",
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cmdtp->name);
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}
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int
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do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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#if defined(CONFIG_8xx)
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volatile sysconf8xx_t *sc = &immap->im_siu_conf;
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#elif defined(CONFIG_8260)
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volatile sysconf8260_t *sc = &immap->im_siu_conf;
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#endif
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printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr);
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#if defined(CONFIG_8xx)
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printf ("SWT = %08x\n", sc->sc_swt);
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printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
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printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
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printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr);
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#elif defined(CONFIG_8260)
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printf ("BCR = %08x\n", sc->sc_bcr);
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printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n",
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sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
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printf ("L_ACR = %02x L_ALRH= %08x L_ALRL= %08x\n",
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sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl);
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printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2);
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printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2);
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printf ("PDTEA = %08x PDTEM = %02x\n", sc->sc_pdtea, sc->sc_pdtem);
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printf ("LDTEA = %08x LDTEM = %02x\n", sc->sc_ldtea, sc->sc_ldtem);
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#endif
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return 0;
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}
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int
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do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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#if defined(CONFIG_8xx)
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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int nbanks = 8;
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#elif defined(CONFIG_8260)
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volatile memctl8260_t *memctl = &immap->im_memctl;
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int nbanks = 12;
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#endif
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volatile uint *p = &memctl->memc_br0;
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int i;
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for (i = 0; i < nbanks; i++, p += 2) {
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if (i < 10) {
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printf ("BR%d = %08x OR%d = %08x\n",
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i, p[0], i, p[1]);
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} else {
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printf ("BR%d = %08x OR%d = %08x\n",
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i, p[0], i, p[1]);
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}
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}
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printf ("MAR = %08x", memctl->memc_mar);
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#if defined(CONFIG_8xx)
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printf (" MCR = %08x\n", memctl->memc_mcr);
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#elif defined(CONFIG_8260)
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putc ('\n');
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#endif
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printf ("MAMR = %08x MBMR = %08x",
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memctl->memc_mamr, memctl->memc_mbmr);
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#if defined(CONFIG_8xx)
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printf ("\nMSTAT = %04x\n", memctl->memc_mstat);
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#elif defined(CONFIG_8260)
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printf (" MCMR = %08x\n", memctl->memc_mcmr);
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#endif
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printf ("MPTPR = %04x MDR = %08x\n",
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memctl->memc_mptpr, memctl->memc_mdr);
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#if defined(CONFIG_8260)
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printf ("PSDMR = %08x LSDMR = %08x\n",
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memctl->memc_psdmr, memctl->memc_lsdmr);
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printf ("PURT = %02x PSRT = %02x\n",
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memctl->memc_purt, memctl->memc_psrt);
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printf ("LURT = %02x LSRT = %02x\n",
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memctl->memc_lurt, memctl->memc_lsrt);
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printf ("IMMR = %08x\n", memctl->memc_immr);
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#endif
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return 0;
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}
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int
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do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unimplemented (cmdtp, flag, argc, argv);
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return 0;
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}
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#ifdef CONFIG_8260
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int
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do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unimplemented (cmdtp, flag, argc, argv);
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return 0;
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}
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#endif
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int
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do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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#if defined(CONFIG_8xx)
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volatile car8xx_t *car = &immap->im_clkrst;
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#elif defined(CONFIG_8260)
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volatile car8260_t *car = &immap->im_clkrst;
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#endif
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#if defined(CONFIG_8xx)
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printf ("SCCR = %08x\n", car->car_sccr);
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printf ("PLPRCR= %08x\n", car->car_plprcr);
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printf ("RSR = %08x\n", car->car_rsr);
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#elif defined(CONFIG_8260)
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printf ("SCCR = %08x\n", car->car_sccr);
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printf ("SCMR = %08x\n", car->car_scmr);
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printf ("RSR = %08x\n", car->car_rsr);
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printf ("RMR = %08x\n", car->car_rmr);
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#endif
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return 0;
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}
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static int counter;
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static void
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header(void)
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{
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char *data = "\
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-------------------------------- --------------------------------\
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00000000001111111111222222222233 00000000001111111111222222222233\
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01234567890123456789012345678901 01234567890123456789012345678901\
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-------------------------------- --------------------------------\
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";
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int i;
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if (counter % 2)
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putc('\n');
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counter = 0;
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for (i = 0; i < 4; i++, data += 79)
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printf("%.79s\n", data);
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}
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static void binary (char *label, uint value, int nbits)
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{
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uint mask = 1 << (nbits - 1);
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int i, second = (counter++ % 2);
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if (second)
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putc (' ');
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puts (label);
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for (i = 32 + 1; i != nbits; i--)
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putc (' ');
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while (mask != 0) {
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if (value & mask)
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putc ('1');
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else
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putc ('0');
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mask >>= 1;
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}
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if (second)
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putc ('\n');
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}
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#if defined(CONFIG_8xx)
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#define PA_NBITS 16
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#define PA_NB_ODR 8
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#define PB_NBITS 18
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#define PB_NB_ODR 16
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#define PC_NBITS 12
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#define PD_NBITS 13
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#elif defined(CONFIG_8260)
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#define PA_NBITS 32
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#define PA_NB_ODR 32
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#define PB_NBITS 28
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#define PB_NB_ODR 28
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#define PC_NBITS 32
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#define PD_NBITS 28
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#endif
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int
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do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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#if defined(CONFIG_8xx)
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volatile iop8xx_t *iop = &immap->im_ioport;
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volatile ushort *l, *r;
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#elif defined(CONFIG_8260)
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volatile iop8260_t *iop = &immap->im_ioport;
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volatile uint *l, *r;
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#endif
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volatile uint *R;
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counter = 0;
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header ();
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/*
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* Ports A & B
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*/
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#if defined(CONFIG_8xx)
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l = &iop->iop_padir;
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R = &immap->im_cpm.cp_pbdir;
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#elif defined(CONFIG_8260)
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l = &iop->iop_pdira;
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R = &iop->iop_pdirb;
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#endif
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binary ("PA_DIR", *l++, PA_NBITS);
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binary ("PB_DIR", *R++, PB_NBITS);
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binary ("PA_PAR", *l++, PA_NBITS);
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binary ("PB_PAR", *R++, PB_NBITS);
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#if defined(CONFIG_8260)
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binary ("PA_SOR", *l++, PA_NBITS);
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binary ("PB_SOR", *R++, PB_NBITS);
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#endif
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binary ("PA_ODR", *l++, PA_NB_ODR);
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binary ("PB_ODR", *R++, PB_NB_ODR);
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binary ("PA_DAT", *l++, PA_NBITS);
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binary ("PB_DAT", *R++, PB_NBITS);
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header ();
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/*
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* Ports C & D
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*/
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#if defined(CONFIG_8xx)
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l = &iop->iop_pcdir;
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r = &iop->iop_pddir;
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#elif defined(CONFIG_8260)
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l = &iop->iop_pdirc;
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r = &iop->iop_pdird;
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#endif
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binary ("PC_DIR", *l++, PC_NBITS);
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binary ("PD_DIR", *r++, PD_NBITS);
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binary ("PC_PAR", *l++, PC_NBITS);
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binary ("PD_PAR", *r++, PD_NBITS);
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#if defined(CONFIG_8xx)
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binary ("PC_SO ", *l++, PC_NBITS);
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binary (" ", 0, 0);
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r++;
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#elif defined(CONFIG_8260)
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binary ("PC_SOR", *l++, PC_NBITS);
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binary ("PD_SOR", *r++, PD_NBITS);
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binary ("PC_ODR", *l++, PC_NBITS);
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binary ("PD_ODR", *r++, PD_NBITS);
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#endif
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binary ("PC_DAT", *l++, PC_NBITS);
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binary ("PD_DAT", *r++, PD_NBITS);
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#if defined(CONFIG_8xx)
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binary ("PC_INT", *l++, PC_NBITS);
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#endif
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header ();
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return 0;
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}
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/*
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* set the io pins
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* this needs a clean up for smaller tighter code
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* use *uint and set the address based on cmd + port
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*/
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int
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do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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uint rcode = 0;
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iopin_t iopin;
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static uint port = 0;
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static uint pin = 0;
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static uint value = 0;
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static enum {
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DIR,
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PAR,
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SOR,
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ODR,
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DAT,
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#if defined(CONFIG_8xx)
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INT
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#endif
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} cmd = DAT;
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if (argc != 5) {
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puts ("iopset PORT PIN CMD VALUE\n");
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return 1;
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}
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port = argv[1][0] - 'A';
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if (port > 3)
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port -= 0x20;
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if (port > 3)
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rcode = 1;
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pin = simple_strtol (argv[2], NULL, 10);
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if (pin > 31)
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rcode = 1;
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|
|
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switch (argv[3][0]) {
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case 'd':
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if (argv[3][1] == 'a')
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cmd = DAT;
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else if (argv[3][1] == 'i')
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cmd = DIR;
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else
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rcode = 1;
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break;
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case 'p':
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cmd = PAR;
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break;
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case 'o':
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cmd = ODR;
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break;
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case 's':
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cmd = SOR;
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break;
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#if defined(CONFIG_8xx)
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case 'i':
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cmd = INT;
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break;
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#endif
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default:
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printf ("iopset: unknown command %s\n", argv[3]);
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rcode = 1;
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}
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if (argv[4][0] == '1')
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value = 1;
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else if (argv[4][0] == '0')
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value = 0;
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else
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rcode = 1;
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if (rcode == 0) {
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iopin.port = port;
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iopin.pin = pin;
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iopin.flag = 0;
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switch (cmd) {
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case DIR:
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if (value)
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iopin_set_out (&iopin);
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else
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iopin_set_in (&iopin);
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break;
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case PAR:
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if (value)
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iopin_set_ded (&iopin);
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else
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iopin_set_gen (&iopin);
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break;
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case SOR:
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if (value)
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iopin_set_opt2 (&iopin);
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else
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iopin_set_opt1 (&iopin);
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break;
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case ODR:
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if (value)
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iopin_set_odr (&iopin);
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else
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iopin_set_act (&iopin);
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break;
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case DAT:
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if (value)
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|
iopin_set_high (&iopin);
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|
else
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|
iopin_set_low (&iopin);
|
|
break;
|
|
#if defined(CONFIG_8xx)
|
|
case INT:
|
|
if (value)
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|
iopin_set_falledge (&iopin);
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|
else
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|
iopin_set_anyedge (&iopin);
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break;
|
|
#endif
|
|
}
|
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|
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}
|
|
return rcode;
|
|
}
|
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|
|
int
|
|
do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
static void prbrg (int n, uint val)
|
|
{
|
|
uint extc = (val >> 14) & 3;
|
|
uint cd = (val & CPM_BRG_CD_MASK) >> 1;
|
|
uint div16 = (val & CPM_BRG_DIV16) != 0;
|
|
|
|
#if defined(CONFIG_8xx)
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
ulong clock = gd->cpu_clk;
|
|
#elif defined(CONFIG_8260)
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
ulong clock = gd->brg_clk;
|
|
#endif
|
|
|
|
printf ("BRG%d:", n);
|
|
|
|
if (val & CPM_BRG_RST)
|
|
puts (" RESET");
|
|
else
|
|
puts (" ");
|
|
|
|
if (val & CPM_BRG_EN)
|
|
puts (" ENABLED");
|
|
else
|
|
puts (" DISABLED");
|
|
|
|
printf (" EXTC=%d", extc);
|
|
|
|
if (val & CPM_BRG_ATB)
|
|
puts (" ATB");
|
|
else
|
|
puts (" ");
|
|
|
|
printf (" DIVIDER=%4d", cd);
|
|
if (extc == 0 && cd != 0) {
|
|
uint baudrate;
|
|
|
|
if (div16)
|
|
baudrate = (clock / 16) / (cd + 1);
|
|
else
|
|
baudrate = clock / (cd + 1);
|
|
|
|
printf ("=%6d bps", baudrate);
|
|
} else {
|
|
puts (" ");
|
|
}
|
|
|
|
if (val & CPM_BRG_DIV16)
|
|
puts (" DIV16");
|
|
else
|
|
puts (" ");
|
|
|
|
putc ('\n');
|
|
}
|
|
|
|
int
|
|
do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
|
|
|
#if defined(CONFIG_8xx)
|
|
volatile cpm8xx_t *cp = &immap->im_cpm;
|
|
volatile uint *p = &cp->cp_brgc1;
|
|
#elif defined(CONFIG_8260)
|
|
volatile uint *p = &immap->im_brgc1;
|
|
#endif
|
|
int i = 1;
|
|
|
|
while (i <= 4)
|
|
prbrg (i++, *p++);
|
|
|
|
#if defined(CONFIG_8260)
|
|
p = &immap->im_brgc5;
|
|
while (i <= 8)
|
|
prbrg (i++, *p++);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
|
|
|
#if defined(CONFIG_8xx)
|
|
volatile i2c8xx_t *i2c = &immap->im_i2c;
|
|
volatile cpm8xx_t *cp = &immap->im_cpm;
|
|
volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC];
|
|
#elif defined(CONFIG_8260)
|
|
volatile i2c8260_t *i2c = &immap->im_i2c;
|
|
volatile iic_t *iip;
|
|
uint dpaddr;
|
|
|
|
dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE]));
|
|
if (dpaddr == 0)
|
|
iip = NULL;
|
|
else
|
|
iip = (iic_t *) & immap->im_dprambase[dpaddr];
|
|
#endif
|
|
|
|
printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add);
|
|
printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com);
|
|
printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);
|
|
|
|
if (iip == NULL)
|
|
puts ("i2c parameter ram not allocated\n");
|
|
else {
|
|
printf ("RBASE = %08x TBASE = %08x\n",
|
|
iip->iic_rbase, iip->iic_tbase);
|
|
printf ("RFCR = %02x TFCR = %02x\n",
|
|
iip->iic_rfcr, iip->iic_tfcr);
|
|
printf ("MRBLR = %04x\n", iip->iic_mrblr);
|
|
printf ("RSTATE= %08x RDP = %08x\n",
|
|
iip->iic_rstate, iip->iic_rdp);
|
|
printf ("RBPTR = %04x RBC = %04x\n",
|
|
iip->iic_rbptr, iip->iic_rbc);
|
|
printf ("RXTMP = %08x\n", iip->iic_rxtmp);
|
|
printf ("TSTATE= %08x TDP = %08x\n",
|
|
iip->iic_tstate, iip->iic_tdp);
|
|
printf ("TBPTR = %04x TBC = %04x\n",
|
|
iip->iic_tbptr, iip->iic_tbc);
|
|
printf ("TXTMP = %08x\n", iip->iic_txtmp);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unimplemented (cmdtp, flag, argc, argv);
|
|
return 0;
|
|
}
|
|
|
|
/***************************************************/
|
|
|
|
U_BOOT_CMD(
|
|
siuinfo, 1, 1, do_siuinfo,
|
|
"siuinfo - print System Interface Unit (SIU) registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
memcinfo, 1, 1, do_memcinfo,
|
|
"memcinfo- print Memory Controller registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
sitinfo, 1, 1, do_sitinfo,
|
|
"sitinfo - print System Integration Timers (SIT) registers\n",
|
|
NULL
|
|
);
|
|
|
|
#ifdef CONFIG_8260
|
|
U_BOOT_CMD(
|
|
icinfo, 1, 1, do_icinfo,
|
|
"icinfo - print Interrupt Controller registers\n",
|
|
NULL
|
|
);
|
|
#endif
|
|
|
|
U_BOOT_CMD(
|
|
carinfo, 1, 1, do_carinfo,
|
|
"carinfo - print Clocks and Reset registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
iopinfo, 1, 1, do_iopinfo,
|
|
"iopinfo - print I/O Port registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
iopset, 5, 0, do_iopset,
|
|
"iopset - set I/O Port registers\n",
|
|
"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
dmainfo, 1, 1, do_dmainfo,
|
|
"dmainfo - print SDMA/IDMA registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
fccinfo, 1, 1, do_fccinfo,
|
|
"fccinfo - print FCC registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
brginfo, 1, 1, do_brginfo,
|
|
"brginfo - print Baud Rate Generator (BRG) registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
i2cinfo, 1, 1, do_i2cinfo,
|
|
"i2cinfo - print I2C registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
sccinfo, 1, 1, do_sccinfo,
|
|
"sccinfo - print SCC registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
smcinfo, 1, 1, do_smcinfo,
|
|
"smcinfo - print SMC registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
spiinfo, 1, 1, do_spiinfo,
|
|
"spiinfo - print Serial Peripheral Interface (SPI) registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
muxinfo, 1, 1, do_muxinfo,
|
|
"muxinfo - print CPM Multiplexing registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
siinfo, 1, 1, do_siinfo,
|
|
"siinfo - print Serial Interface (SI) registers\n",
|
|
NULL
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
mccinfo, 1, 1, do_mccinfo,
|
|
"mccinfo - print MCC registers\n",
|
|
NULL
|
|
);
|
|
|
|
|
|
#endif /* CFG_CMD_IMMAP && (CONFIG_8xx || CONFIG_8260) */
|
|
|