upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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68 lines
1.7 KiB
68 lines
1.7 KiB
/*
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* Copyright (C) 2013, Intel Corporation
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: Intel
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*/
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#ifndef __FSP_API_H__
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#define __FSP_API_H__
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#include <linux/linkage.h>
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/*
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* FSP common configuration structure.
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* This needs to be included in the platform-specific struct fsp_config_data.
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*/
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struct fsp_cfg_common {
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struct fsp_header *fsp_hdr;
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u32 stack_top;
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u32 boot_mode;
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};
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/*
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* FspInit continuation function prototype.
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* Control will be returned to this callback function after FspInit API call.
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*/
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typedef void (*fsp_continuation_f)(u32 status, void *hob_list);
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struct fsp_init_params {
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/* Non-volatile storage buffer pointer */
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void *nvs_buf;
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/* Runtime buffer pointer */
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void *rt_buf;
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/* Continuation function address */
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fsp_continuation_f continuation;
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};
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struct common_buf {
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/*
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* Stack top pointer used by the bootloader. The new stack frame will be
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* set up at this location after FspInit API call.
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*/
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u32 stack_top;
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u32 boot_mode; /* Current system boot mode */
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void *upd_data; /* User platform configuraiton data region */
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u32 tolum_size; /* Top of low usable memory size (FSP 1.1) */
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u32 reserved[6]; /* Reserved */
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};
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enum fsp_phase {
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/* Notification code for post PCI enuermation */
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INIT_PHASE_PCI = 0x20,
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/* Notification code before transfering control to the payload */
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INIT_PHASE_BOOT = 0x40
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};
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struct fsp_notify_params {
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/* Notification phase used for NotifyPhase API */
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enum fsp_phase phase;
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};
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/* FspInit API function prototype */
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typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params);
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/* FspNotify API function prototype */
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typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params);
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#endif
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