upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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256 lines
6.1 KiB
256 lines
6.1 KiB
/*
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* DENX M53 configuration
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* Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __M53EVK_CONFIG_H__
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#define __M53EVK_CONFIG_H__
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#define CONFIG_MX53
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#define CONFIG_MXC_GPIO
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#include <asm/arch/imx-regs.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_NO_FLASH
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/*
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* U-Boot Commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SATA
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#define CONFIG_CMD_USB
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#define CONFIG_VIDEO
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/*
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* Memory configurations
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*/
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
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#define PHYS_SDRAM_2 CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
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#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0xaff00000
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_TEXT_BASE 0x71000000
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/*
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* U-Boot general configurations
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Print buffer size */
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#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* Boot argument buffer size */
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#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
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#define CONFIG_AUTO_COMPLETE /* Command auto complete */
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#define CONFIG_CMDLINE_EDITING /* Command history etc */
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#define CONFIG_SYS_HUSH_PARSER
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/*
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* Serial Driver
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/*
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* MMC Driver
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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#endif
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/*
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* NAND
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*/
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#define CONFIG_ENV_SIZE (16 * 1024)
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
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#define CONFIG_NAND_MXC
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#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
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#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/* Environment is in NAND */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_RANGE (512 * 1024)
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#define CONFIG_ENV_OFFSET 0x100000
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#define CONFIG_ENV_OFFSET_REDUND \
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(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=mxc-nand"
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#define MTDPARTS_DEFAULT \
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"mtdparts=mxc-nand:" \
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"1m(bootloader)ro," \
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"512k(environment)," \
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"512k(redundant-environment)," \
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"4m(kernel)," \
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"128k(fdt)," \
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"8m(ramdisk)," \
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"-(filesystem)"
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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/*
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* Ethernet on SOC (FEC)
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x0
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#define CONFIG_MII
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#define CONFIG_DISCOVER_PHY
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#endif
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/*
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* I2C
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*/
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
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#endif
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/*
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* RTC
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*/
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#ifdef CONFIG_CMD_DATE
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#define CONFIG_RTC_M41T62
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR 2000
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#endif
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/*
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX5
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#endif
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/*
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* SATA
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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#endif
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/*
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* LCD
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*/
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_IPUV3_CLK 200000000
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#endif
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/*
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* Boot Linux
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*/
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTFILE "m53evk/uImage"
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#define CONFIG_BOOTARGS "console=ttymxc1,115200"
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#define CONFIG_LOADADDR 0x70800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_OF_LIBFDT
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/*
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* NAND SPL
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*/
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_TEXT_BASE 0x70008000
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#define CONFIG_SPL_PAD_TO 0x8000
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#define CONFIG_SPL_STACK 0x70004000
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#endif /* __M53EVK_CONFIG_H__ */
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