upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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352 lines
11 KiB
352 lines
11 KiB
/*
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* Copyright 2008,2010 Freescale Semiconductor, Inc
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* Andy Fleming
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*
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* Based (loosely) on the Linux code
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _MMC_H_
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#define _MMC_H_
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#include <linux/list.h>
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#include <linux/compiler.h>
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#define SD_VERSION_SD 0x20000
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#define SD_VERSION_3 (SD_VERSION_SD | 0x300)
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#define SD_VERSION_2 (SD_VERSION_SD | 0x200)
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#define SD_VERSION_1_0 (SD_VERSION_SD | 0x100)
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#define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a)
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#define MMC_VERSION_MMC 0x10000
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#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC)
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#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102)
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#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104)
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#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202)
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#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300)
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#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400)
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#define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401)
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#define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402)
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#define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403)
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#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429)
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#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405)
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#define MMC_MODE_HS 0x001
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#define MMC_MODE_HS_52MHz 0x010
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#define MMC_MODE_4BIT 0x100
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#define MMC_MODE_8BIT 0x200
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#define MMC_MODE_SPI 0x400
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#define MMC_MODE_HC 0x800
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#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
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#define MMC_MODE_WIDTH_BITS_SHIFT 8
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#define SD_DATA_4BIT 0x00040000
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#define IS_SD(x) (x->version & SD_VERSION_SD)
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#define MMC_DATA_READ 1
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#define MMC_DATA_WRITE 2
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#define NO_CARD_ERR -16 /* No SD/MMC card inserted */
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#define UNUSABLE_ERR -17 /* Unusable Card */
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#define COMM_ERR -18 /* Communications Error */
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#define TIMEOUT -19
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#define IN_PROGRESS -20 /* operation is in progress */
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#define MMC_CMD_GO_IDLE_STATE 0
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#define MMC_CMD_SEND_OP_COND 1
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#define MMC_CMD_ALL_SEND_CID 2
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#define MMC_CMD_SET_RELATIVE_ADDR 3
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#define MMC_CMD_SET_DSR 4
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#define MMC_CMD_SWITCH 6
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#define MMC_CMD_SELECT_CARD 7
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#define MMC_CMD_SEND_EXT_CSD 8
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#define MMC_CMD_SEND_CSD 9
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#define MMC_CMD_SEND_CID 10
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#define MMC_CMD_STOP_TRANSMISSION 12
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#define MMC_CMD_SEND_STATUS 13
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#define MMC_CMD_SET_BLOCKLEN 16
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#define MMC_CMD_READ_SINGLE_BLOCK 17
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#define MMC_CMD_READ_MULTIPLE_BLOCK 18
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24
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#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
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#define MMC_CMD_ERASE_GROUP_START 35
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#define MMC_CMD_ERASE_GROUP_END 36
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#define MMC_CMD_ERASE 38
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#define MMC_CMD_APP_CMD 55
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#define MMC_CMD_SPI_READ_OCR 58
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#define MMC_CMD_SPI_CRC_ON_OFF 59
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#define MMC_CMD_RES_MAN 62
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#define MMC_CMD62_ARG1 0xefac62ec
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#define MMC_CMD62_ARG2 0xcbaea7
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#define SD_CMD_SEND_RELATIVE_ADDR 3
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#define SD_CMD_SWITCH_FUNC 6
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#define SD_CMD_SEND_IF_COND 8
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#define SD_CMD_APP_SET_BUS_WIDTH 6
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#define SD_CMD_ERASE_WR_BLK_START 32
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#define SD_CMD_ERASE_WR_BLK_END 33
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#define SD_CMD_APP_SEND_OP_COND 41
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#define SD_CMD_APP_SEND_SCR 51
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/* SCR definitions in different words */
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#define SD_HIGHSPEED_BUSY 0x00020000
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#define SD_HIGHSPEED_SUPPORTED 0x00020000
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#define MMC_HS_TIMING 0x00000100
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#define MMC_HS_52MHZ 0x2
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#define OCR_BUSY 0x80000000
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#define OCR_HCS 0x40000000
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#define OCR_VOLTAGE_MASK 0x007FFF80
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#define OCR_ACCESS_MODE 0x60000000
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#define SECURE_ERASE 0x80000000
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#define MMC_STATUS_MASK (~0x0206BF7F)
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#define MMC_STATUS_RDY_FOR_DATA (1 << 8)
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#define MMC_STATUS_CURR_STATE (0xf << 9)
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#define MMC_STATUS_ERROR (1 << 19)
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#define MMC_STATE_PRG (7 << 9)
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#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
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#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
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#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
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#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
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#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
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#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
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#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
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#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
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#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
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#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
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#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
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#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
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#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
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#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
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#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
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#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
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#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
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#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
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#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
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addressed by index which are
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1 in value field */
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#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
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addressed by index, which are
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1 in value field */
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#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
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#define SD_SWITCH_CHECK 0
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#define SD_SWITCH_SWITCH 1
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/*
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* EXT_CSD fields
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*/
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#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
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#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
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#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
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#define EXT_CSD_RPMB_MULT 168 /* RO */
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#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
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#define EXT_CSD_BOOT_BUS_WIDTH 177
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#define EXT_CSD_PART_CONF 179 /* R/W */
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#define EXT_CSD_BUS_WIDTH 183 /* R/W */
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#define EXT_CSD_HS_TIMING 185 /* R/W */
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#define EXT_CSD_REV 192 /* RO */
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#define EXT_CSD_CARD_TYPE 196 /* RO */
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#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
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#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
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#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
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#define EXT_CSD_BOOT_MULT 226 /* RO */
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/*
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* EXT_CSD field definitions
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*/
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#define EXT_CSD_CMD_SET_NORMAL (1 << 0)
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#define EXT_CSD_CMD_SET_SECURE (1 << 1)
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#define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
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#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
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#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
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#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
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#define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
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#define EXT_CSD_BOOT_ACK(x) (x << 6)
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#define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
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#define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
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#define R1_ILLEGAL_COMMAND (1 << 22)
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#define R1_APP_CMD (1 << 5)
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#define MMC_RSP_PRESENT (1 << 0)
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#define MMC_RSP_136 (1 << 1) /* 136 bit response */
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#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
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#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
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#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
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#define MMC_RSP_NONE (0)
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#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
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MMC_RSP_BUSY)
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#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
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#define MMC_RSP_R3 (MMC_RSP_PRESENT)
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#define MMC_RSP_R4 (MMC_RSP_PRESENT)
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#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMCPART_NOAVAILABLE (0xff)
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#define PART_ACCESS_MASK (0x7)
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#define PART_SUPPORT (0x1)
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#define PART_ENH_ATTRIB (0x1f)
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/* Maximum block size for MMC */
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#define MMC_MAX_BLOCK_LEN 512
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/* The number of MMC physical partitions. These consist of:
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* boot partitions (2), general purpose partitions (4) in MMC v4.4.
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*/
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#define MMC_NUM_BOOT_PARTITION 2
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struct mmc_cid {
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unsigned long psn;
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unsigned short oid;
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unsigned char mid;
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unsigned char prv;
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unsigned char mdt;
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char pnm[7];
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};
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struct mmc_cmd {
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ushort cmdidx;
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uint resp_type;
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uint cmdarg;
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uint response[4];
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};
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struct mmc_data {
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union {
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char *dest;
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const char *src; /* src buffers don't get written to */
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};
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uint flags;
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uint blocks;
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uint blocksize;
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};
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struct mmc {
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struct list_head link;
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char name[32];
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void *priv;
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uint voltages;
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uint version;
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uint has_init;
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uint f_min;
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uint f_max;
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int high_capacity;
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uint bus_width;
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uint clock;
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uint card_caps;
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uint host_caps;
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uint ocr;
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uint dsr;
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uint dsr_imp;
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uint scr[2];
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uint csd[4];
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uint cid[4];
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ushort rca;
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char part_config;
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char part_num;
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uint tran_speed;
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uint read_bl_len;
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uint write_bl_len;
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uint erase_grp_size;
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u64 capacity;
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u64 capacity_user;
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u64 capacity_boot;
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u64 capacity_rpmb;
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u64 capacity_gp[4];
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block_dev_desc_t block_dev;
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int (*send_cmd)(struct mmc *mmc,
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struct mmc_cmd *cmd, struct mmc_data *data);
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void (*set_ios)(struct mmc *mmc);
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int (*init)(struct mmc *mmc);
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int (*getcd)(struct mmc *mmc);
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int (*getwp)(struct mmc *mmc);
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uint b_max;
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char op_cond_pending; /* 1 if we are waiting on an op_cond command */
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char init_in_progress; /* 1 if we have done mmc_start_init() */
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char preinit; /* start init as early as possible */
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uint op_cond_response; /* the response byte from the last op_cond */
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};
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int mmc_register(struct mmc *mmc);
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int mmc_initialize(bd_t *bis);
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int mmc_init(struct mmc *mmc);
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int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
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void mmc_set_clock(struct mmc *mmc, uint clock);
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struct mmc *find_mmc_device(int dev_num);
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int mmc_set_dev(int dev_num);
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void print_mmc_devices(char separator);
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int get_mmc_num(void);
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int board_mmc_getcd(struct mmc *mmc);
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int mmc_switch_part(int dev_num, unsigned int part_num);
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int mmc_getcd(struct mmc *mmc);
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int mmc_getwp(struct mmc *mmc);
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int mmc_set_dsr(struct mmc *mmc, u16 val);
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/* Function to change the size of boot partition and rpmb partitions */
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int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
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unsigned long rpmbsize);
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/* Function to send commands to open/close the specified boot partition */
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int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
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/**
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* Start device initialization and return immediately; it does not block on
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* polling OCR (operation condition register) status. Then you should call
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* mmc_init, which would block on polling OCR status and complete the device
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* initializatin.
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*
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* @param mmc Pointer to a MMC device struct
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* @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
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*/
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int mmc_start_init(struct mmc *mmc);
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/**
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* Set preinit flag of mmc device.
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*
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* This will cause the device to be pre-inited during mmc_initialize(),
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* which may save boot time if the device is not accessed until later.
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* Some eMMC devices take 200-300ms to init, but unfortunately they
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* must be sent a series of commands to even get them to start preparing
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* for operation.
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*
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* @param mmc Pointer to a MMC device struct
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* @param preinit preinit flag value
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*/
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void mmc_set_preinit(struct mmc *mmc, int preinit);
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#ifdef CONFIG_GENERIC_MMC
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#ifdef CONFIG_MMC_SPI
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#define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI)
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#else
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#define mmc_host_is_spi(mmc) 0
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#endif
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struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
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#else
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int mmc_legacy_init(int verbose);
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#endif
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#endif /* _MMC_H_ */
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