upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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86 lines
2.8 KiB
86 lines
2.8 KiB
/*
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* BMW/MPC8245 Board definitions.
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* For more info, see http://www.vooha.com/
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2002
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* James Dougherty (jfd@broadcom.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __BMW_H
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#define __BMW_H
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/* System addresses */
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#define PCI_SPECIAL_BASE 0xfe000000
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#define PCI_SPECIAL_SIZE 0x01000000
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#define EUMBBAR_VAL 0x80500000 /* Location of EUMB region */
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#define EUMBSIZE 0x00100000 /* Size of EUMB region */
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/* Extended ROM space devices */
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#define DOC_BASE_ADDR 0xff000000 /* Onboard DOC TSOP 16MB */
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#define DOC2_BASE_ADDR 0x70000000 /* DIP32 socket -> 1GB */
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#define XROM_BASE_ADDR 0x7c000000 /* RCS2 (PAL / Satellite IO) */
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#define PLD_REG_BASE XROM_BASE_ADDR
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#define LED_REG_BASE (XROM_BASE_ADDR | 0x2000)
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#define TOD_BASE (XROM_BASE_ADDR | 0x4000)
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#define LED_REG(x) (*(volatile unsigned char *) \
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(LED_REG_BASE + (x)))
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#define XROM_DEV_SIZE 0x00006000
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#define ENET_DEV_BASE 0x80000000
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#define PLD_REG(off) (*(volatile unsigned char *)\
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(PLD_REG_BASE + (off)))
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#define PLD_REVID_B1 0x7f /* Fix me */
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#define PLD_REVID_B2 0x01 /* Fix me */
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#define SYS_HARD_RESET() { for (;;) PLD_REG(0) = 0; } /* clr 0x80 bit */
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#define SYS_REVID_GET() ((int) PLD_REG(0) & 0x7f)
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#define SYS_LED_OFF() (PLD_REG(1) |= 0x80)
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#define SYS_LED_ON() (PLD_REG(1) &= ~0x80)
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#define SYS_WATCHDOG_IRQ3() (PLD_REG(2) |= 0x80)
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#define SYS_WATCHDOG_RESET() (PLD_REG(2) &= ~0x80)
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#define SYS_TOD_PROTECT() (PLD_REG(3) |= 0x80)
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#define SYS_TOD_UNPROTECT() (PLD_REG(3) &= ~0x80)
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#define TOD_REG_BASE (TOD_BASE | 0x1ff0)
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#define TOD_NVRAM_BASE TOD_BASE
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#define TOD_NVRAM_SIZE 0x1ff0
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#define TOD_NVRAM_LIMIT (TOD_NVRAM_BASE + TOD_NVRAM_SIZE)
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#define RTC(r) (TOD_BASE + r)
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/* Onboard BCM570x device */
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#define PCI_ENET_IOADDR 0x80000000
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#define PCI_ENET_MEMADDR 0x80000000
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#ifndef __ASSEMBLY__
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/* C Function prototypes */
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void sys_led_msg(char* msg);
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#endif /* !__ASSEMBLY__ */
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#endif /* __BMW_H */
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