upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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41 lines
1.1 KiB
41 lines
1.1 KiB
U-Boot I2C
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----------
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U-Boot's I2C model has the concept of an offset within a chip (I2C target
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device). The offset can be up to 4 bytes long, but is normally 1 byte,
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meaning that offsets from 0 to 255 are supported by the chip. This often
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corresponds to register numbers.
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Apart from the controller-specific I2C bindings, U-Boot supports a special
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property which allows the chip offset length to be selected.
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Optional properties:
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- u-boot,i2c-offset-len - length of chip offset in bytes. If omitted the
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default value of 1 is used.
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- gpios = <sda ...>, <scl ...>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&i2c_xfer>;
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pinctrl-1 = <&i2c_gpio>;
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Pin description for I2C bus software deblocking.
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Example
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-------
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i2c4: i2c@12ca0000 {
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cros-ec@1e {
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reg = <0x1e>;
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compatible = "google,cros-ec";
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i2c-max-frequency = <100000>;
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u-boot,i2c-offset-len = <0>;
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ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
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};
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};
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&i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&i2c1_xfer>;
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pinctrl-1 = <&i2c1_gpio>;
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gpios = <&gpio1 26 GPIO_ACTIVE_LOW>, /* SDA */
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<&gpio1 27 GPIO_ACTIVE_LOW>; /* SCL */
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};
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