upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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99 lines
2.7 KiB
99 lines
2.7 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it>
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* Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it>
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* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
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*
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* Configuration settings for the BTicion i.MX6DL Mamoj board.
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*/
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#ifndef __IMX6DL_MAMOJ_CONFIG_H
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#define __IMX6DL_MAMOJ_CONFIG_H
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#include <linux/sizes.h>
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#include "mx6_common.h"
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
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/* Total Size of Environment Sector */
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#define CONFIG_ENV_SIZE SZ_128K
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* Environment */
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#ifndef CONFIG_ENV_IS_NOWHERE
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/* Environment in MMC */
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# if defined(CONFIG_ENV_IS_IN_MMC)
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# define CONFIG_ENV_OFFSET 0x100000
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# endif
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#endif
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"scriptaddr=0x14000000\0" \
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"fdt_addr_r=0x13000000\0" \
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"kernel_addr_r=0x10008000\0" \
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"fdt_high=0xffffffff\0" \
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"dfu_alt_info_spl=spl raw 0x2 0x400\0" \
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"dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 2)
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#include <config_distro_bootcmd.h>
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#endif
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/* UART */
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#define CONFIG_MXC_UART_BASE UART3_BASE
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/* MMC */
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#define CONFIG_SYS_MMC_ENV_DEV 2
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#define CONFIG_SUPPORT_EMMC_BOOT
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/* Ethernet */
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#define CONFIG_FEC_MXC_PHYADDR 1
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/* USB */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* Falcon */
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_CMD_SPL
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
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#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
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/* MMC support: args@1MB kernel@2MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_SP_OFFSET)
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/* SPL */
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#include "imx6_spl.h"
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#endif /* __IMX6DL_MAMOJ_CONFIG_H */
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