upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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151 lines
5.1 KiB
151 lines
5.1 KiB
/*
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* Configuation settings for the Renesas Solutions Migo-R board
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*
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* Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __MIGO_R_H
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#define __MIGO_R_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7722 1
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#define CONFIG_MIGO_R 1
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#define CONFIG_CMD_LOADB
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_DFL
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_ENV
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 192.168.10.100
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#define CONFIG_SERVERIP 192.168.10.77
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#define CONFIG_GATEWAYIP 192.168.10.77
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#define CONFIG_VERSION_VARIABLE
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#undef CONFIG_SHOW_BOOT_PROGRESS
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/* SMC9111 */
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#define CONFIG_DRIVER_SMC91111
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#define CONFIG_SMC91111_BASE (0xB0000000)
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/* MEMORY */
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#define MIGO_R_SDRAM_BASE (0x8C000000)
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#define MIGO_R_FLASH_BASE_1 (0xA0000000)
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#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
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#define CFG_PBSIZE 256 /* Buffer size for Console output */
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#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
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#define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */
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#define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
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/* SCIF */
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#define CFG_SCIF_CONSOLE 1
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#define CONFIG_CONS_SCIF0 1
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#undef CFG_CONSOLE_INFO_QUIET /* Suppress display of console
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information at boot */
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#undef CFG_CONSOLE_OVERWRITE_ROUTINE
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#undef CFG_CONSOLE_ENV_OVERWRITE
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#define CFG_MEMTEST_START (MIGO_R_SDRAM_BASE)
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#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024))
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/* Enable alternate, more extensive, memory test */
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#undef CFG_ALT_MEMTEST
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/* Scratch address used by the alternate memory test */
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#undef CFG_MEMTEST_SCRATCH
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/* Enable temporary baudrate change while serial download */
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#undef CFG_LOADS_BAUD_CHANGE
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#define CFG_SDRAM_BASE (MIGO_R_SDRAM_BASE)
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/* maybe more, but if so u-boot doesn't know about it... */
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#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
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/* default load address for scripts ?!? */
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#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 16 * 1024 * 1024)
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/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
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#define CFG_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
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/* Monitor size */
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#define CFG_MONITOR_LEN (128 * 1024)
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/* Size of DRAM reserved for malloc() use */
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#define CFG_MALLOC_LEN (256 * 1024)
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/* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_SIZE (256)
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#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
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/* FLASH */
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#define CFG_FLASH_CFI
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#define CFG_FLASH_CFI_DRIVER
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#undef CFG_FLASH_QUIET_TEST
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/* print 'E' for empty sector on flinfo */
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#define CFG_FLASH_EMPTY_INFO
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/* Physical start address of Flash memory */
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#define CFG_FLASH_BASE (MIGO_R_FLASH_BASE_1)
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/* Max number of sectors on each Flash chip */
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#define CFG_MAX_FLASH_SECT 512
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/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
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#define CFG_MAX_FLASH_BANKS 1
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
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/* Timeout for Flash erase operations (in ms) */
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#define CFG_FLASH_ERASE_TOUT (3 * 1000)
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/* Timeout for Flash write operations (in ms) */
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#define CFG_FLASH_WRITE_TOUT (3 * 1000)
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/* Timeout for Flash set sector lock bit operations (in ms) */
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#define CFG_FLASH_LOCK_TOUT (3 * 1000)
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/* Timeout for Flash clear lock bit operations (in ms) */
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#define CFG_FLASH_UNLOCK_TOUT (3 * 1000)
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/* Use hardware flash sectors protection instead of U-Boot software protection */
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#undef CFG_FLASH_PROTECTION
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#undef CFG_DIRECT_FLASH_TFTP
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/* ENV setting */
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#define CFG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_OVERWRITE 1
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#define CFG_ENV_SECT_SIZE (128 * 1024)
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#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
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/* Offset of env Flash sector relative to CFG_FLASH_BASE */
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#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE)
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
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#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
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#endif /* __MIGO_R_H */
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