upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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165 lines
4.9 KiB
165 lines
4.9 KiB
/*
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* Configuation settings for the Renesas R7780MP board
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*
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* Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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* Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __R7780RP_H
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#define __R7780RP_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_CPU_SH7780 1
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#define CONFIG_R7780MP 1
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#define __LITTLE_ENDIAN 1
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_EXT2
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#define CONFIG_DOS_PARTITION
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#define CFG_SCIF_CONSOLE 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_CONS_SCIF0 1
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttySC0,115200"
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#define CONFIG_ENV_OVERWRITE 1
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/* check for keypress on bootdelay==0 */
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/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
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/* Network setting */
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#define CONFIG_NETMASK 255.0.0.0
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#define CONFIG_IPADDR 10.0.192.82
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#define CONFIG_SERVERIP 10.0.0.1
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#define CONFIG_GATEWAYIP 10.0.0.1
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#define CFG_SDRAM_BASE (0x08000000)
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#define CFG_SDRAM_SIZE (128 * 1024 * 1024)
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#define CFG_LONGHELP
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#define CFG_PROMPT "=> "
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#define CFG_CBSIZE 256
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#define CFG_PBSIZE 256
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#define CFG_MAXARGS 16
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#define CFG_BARGSIZE 512
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/* List of legal baudrate settings for this board */
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#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
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#define CFG_MEMTEST_START (CFG_SDRAM_BASE)
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#define CFG_MEMTEST_END (TEXT_BASE - 0x100000)
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/* NOR Flash (S29PL127J60TFI130) */
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#define CFG_FLASH_BASE (0xA0000000)
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#define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
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#define CFG_MAX_FLASH_BANKS (2)
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#define CFG_MAX_FLASH_SECT 270
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE,\
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CFG_FLASH_BASE + 0x100000,\
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CFG_FLASH_BASE + 0x400000,\
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CFG_FLASH_BASE + 0x700000, }
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#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024)
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/* Address of u-boot image in Flash */
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#define CFG_MONITOR_BASE (CFG_FLASH_BASE)
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#define CFG_MONITOR_LEN (112 * 1024)
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/* Size of DRAM reserved for malloc() use */
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#define CFG_MALLOC_LEN (256 * 1024)
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/* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_SIZE (256)
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#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
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#define CFG_RX_ETH_BUFFER (8)
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#define CFG_FLASH_CFI
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#define CFG_FLASH_CFI_DRIVER
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#undef CFG_FLASH_CFI_BROKEN_TABLE
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#undef CFG_FLASH_QUIET_TEST
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/* print 'E' for empty sector on flinfo */
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#define CFG_FLASH_EMPTY_INFO
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#define CFG_ENV_IS_IN_FLASH
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#define CFG_ENV_SECT_SIZE (16 * 1024)
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#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
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#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
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#define CFG_FLASH_ERASE_TOUT 120000
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#define CFG_FLASH_WRITE_TOUT 500
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define TMU_CLK_DIVIDER 4
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#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
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/* PCI Controller */
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#if defined(CONFIG_CMD_PCI)
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#define CONFIG_PCI
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#define CONFIG_SH4_PCI
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#define CONFIG_SH7780_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW 1
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#define __io
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#define __mem_pci
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#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
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#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
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#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
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#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
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#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
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#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
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#endif /* CONFIG_CMD_PCI */
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#if defined(CONFIG_CMD_NET)
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/* #define CONFIG_NET_MULTI
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#define CONFIG_RTL8169 */
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/* AX88696L Support(NE2000 base chip) */
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#define CONFIG_DRIVER_NE2000
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#define CONFIG_DRIVER_AX88796L
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#define CONFIG_DRIVER_NE2000_BASE 0xA4100000
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#endif
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/* Compact flash Support */
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#if defined(CONFIG_CMD_IDE)
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#define CONFIG_IDE_RESET 1
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#define CFG_PIO_MODE 1
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#define CFG_IDE_MAXBUS 1 /* IDE bus */
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#define CFG_IDE_MAXDEVICE 1
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#define CFG_ATA_BASE_ADDR 0xb4000000
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#define CFG_ATA_STRIDE 2 /* 1bit shift */
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#define CFG_ATA_DATA_OFFSET 0x1000 /* data reg offset */
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#define CFG_ATA_REG_OFFSET 0x1000 /* reg offset */
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#define CFG_ATA_ALT_OFFSET 0x800 /* alternate register offset */
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#endif /* CONFIG_CMD_IDE */
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#endif /* __R7780RP_H */
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