upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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137 lines
2.6 KiB
137 lines
2.6 KiB
/*
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* Copyright 2007-2009 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include "config.h" /* CONFIG_BOARDDIR */
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#ifndef RESET_VECTOR_ADDRESS
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#ifdef CONFIG_RESET_VECTOR_ADDRESS
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#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
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#else
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#define RESET_VECTOR_ADDRESS 0xfffffffc
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#endif
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#endif
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OUTPUT_ARCH(powerpc)
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PHDRS
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{
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text PT_LOAD;
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bss PT_LOAD;
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}
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SECTIONS
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{
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/* Read-only sections, merged into text segment: */
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. = + SIZEOF_HEADERS;
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.text :
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{
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*(.text*)
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} :text
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_etext = .;
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PROVIDE (etext = .);
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.rodata :
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{
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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} :text
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/* Read-write section, merged into data segment: */
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. = (. + 0x00FF) & 0xFFFFFF00;
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_erotext = .;
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PROVIDE (erotext = .);
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.reloc :
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{
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_GOT2_TABLE_ = .;
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KEEP(*(.got2))
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KEEP(*(.got))
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PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
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_FIXUP_TABLE_ = .;
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KEEP(*(.fixup))
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}
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__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
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__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
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.data :
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{
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*(.data*)
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*(.sdata*)
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}
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_edata = .;
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PROVIDE (edata = .);
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. = .;
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. = ALIGN(4);
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.u_boot_list : {
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KEEP(*(SORT(.u_boot_list*)));
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}
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. = .;
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__start___ex_table = .;
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__ex_table : { *(__ex_table) }
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__stop___ex_table = .;
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. = ALIGN(256);
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__init_begin = .;
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.text.init : { *(.text.init) }
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.data.init : {
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*(.data.init)
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. = ALIGN(256);
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LONG(0) LONG(0) /* Extend u-boot.bin to here */
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}
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__init_end = .;
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_end = .;
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#ifndef CONFIG_SPL
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#ifdef CONFIG_440
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.bootpg RESET_VECTOR_ADDRESS - 0xffc :
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{
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arch/powerpc/cpu/ppc4xx/start.o (.bootpg)
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/*
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* PPC440 board need a board specific object with the
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* TLB definitions. This needs to get included right after
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* start.o, since the first shadow TLB only covers 4k
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* of address space.
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*/
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#ifdef CONFIG_INIT_TLB
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CONFIG_INIT_TLB (.bootpg)
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#else
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CONFIG_BOARDDIR/init.o (.bootpg)
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#endif
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} :text = 0xffff
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#endif
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.resetvec RESET_VECTOR_ADDRESS :
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{
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KEEP(*(.resetvec))
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} :text = 0xffff
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. = RESET_VECTOR_ADDRESS + 0x4;
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/*
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* Make sure that the bss segment isn't linked at 0x0, otherwise its
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* address won't be updated during relocation fixups. Note that
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* this is a temporary fix. Code to dynamically the fixup the bss
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* location will be added in the future. When the bss relocation
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* fixup code is present this workaround should be removed.
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*/
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#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
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. |= 0x10;
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#endif
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#endif /* CONFIG_SPL */
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__bss_start = .;
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.bss (NOLOAD) :
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{
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*(.bss*)
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*(.sbss*)
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*(COMMON)
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} :bss
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. = ALIGN(4);
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__bss_end = . ;
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PROVIDE (end = .);
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}
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