upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Dave Mitchell ddf45cc758 ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization ... Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>		16 years ago
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acadia	Align end of bss by 4 bytes	16 years ago
bamboo	Align end of bss by 4 bytes	16 years ago
bubinga	Align end of bss by 4 bytes	16 years ago
canyonlands	ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization	16 years ago
common	…
ebony	Align end of bss by 4 bytes	16 years ago
katmai	Align end of bss by 4 bytes	16 years ago
kilauea	Align end of bss by 4 bytes	16 years ago
luan	ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs	16 years ago
makalu	Align end of bss by 4 bytes	16 years ago
ocotea	Align end of bss by 4 bytes	16 years ago
redwood	Align end of bss by 4 bytes	16 years ago
sequoia	Align end of bss by 4 bytes	16 years ago
taihu	Align end of bss by 4 bytes	16 years ago
taishan	Align end of bss by 4 bytes	16 years ago
walnut	Align end of bss by 4 bytes	16 years ago
yosemite	Align end of bss by 4 bytes	16 years ago
yucca	Align end of bss by 4 bytes	16 years ago