upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/arch/arm/dts/stm32f746-disco.dts

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/*
* Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
* Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
*
* Based on:
* stm32f469-disco.dts from Linux
* Copyright 2016 - Lee Jones <lee.jones@linaro.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "stm32f746.dtsi"
#include <dt-bindings/memory/stm32-sdram.h>
/ {
model = "STMicroelectronics STM32F746-DISCO board";
compatible = "st,stm32f746-disco", "st,stm32f746";
chosen {
bootargs = "root=/dev/ram rdinit=/linuxrc";
stdout-path = "serial0:115200n8";
};
memory {
reg = <0xC0000000 0x800000>;
};
aliases {
serial0 = &usart1;
spi0 = &qspi;
/* Aliases for gpios so as to use sequence */
gpio0 = &gpioa;
gpio1 = &gpiob;
gpio2 = &gpioc;
gpio3 = &gpiod;
gpio4 = &gpioe;
gpio5 = &gpiof;
gpio6 = &gpiog;
gpio7 = &gpioh;
gpio8 = &gpioi;
gpio9 = &gpioj;
gpio10 = &gpiok;
};
led1 {
compatible = "st,led1";
led-gpio = <&gpioi 1 0>;
};
button1 {
compatible = "st,button1";
button-gpio = <&gpioi 11 0>;
};
};
&clk_hse {
clock-frequency = <25000000>;
};
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
status = "okay";
};
&fmc {
pinctrl-0 = <&fmc_pins>;
pinctrl-names = "default";
status = "okay";
mr-nbanks = <1>;
/* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */
bank1: bank@0 {
st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_4
CAS_3 SDCLK_2 RD_BURST_EN
RD_PIPE_DL_0>;
st,sdram-timing = /bits/ 8 <TMRD_2 TXSR_6 TRAS_4 TRC_6 TWR_2
TRP_2 TRCD_2>;
/* refcount = (64msec/total_row_sdram)*freq - 20 */
st,sdram-refcount = < 1542 >;
};
};
&mac {
status = "okay";
pinctrl-0 = <&ethernet_mii>;
phy-mode = "rmii";
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&qspi {
pinctrl-0 = <&qspi_pins>;
status = "okay";
qflash0: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a13", "spi-flash";
spi-max-frequency = <108000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
memory-map = <0x90000000 0x1000000>;
reg = <0>;
};
};